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Title: Semiconductor device PN junction fabrication using optical processing of amorphous semiconductor material

Abstract

Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.

Inventors:
;
Issue Date:
Research Org.:
National Renewable Energy Lab. (NREL), Golden, CO (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1164345
Patent Number(s):
8,895,416
Application Number:
13/793,626
Assignee:
Alliance for Sustainable Energy, LLC (Golden, CO)
DOE Contract Number:  
AC36-08GO28308
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE; 14 SOLAR ENERGY

Citation Formats

Sopori, Bhushan, and Rangappan, Anikara. Semiconductor device PN junction fabrication using optical processing of amorphous semiconductor material. United States: N. p., 2014. Web.
Sopori, Bhushan, & Rangappan, Anikara. Semiconductor device PN junction fabrication using optical processing of amorphous semiconductor material. United States.
Sopori, Bhushan, and Rangappan, Anikara. Tue . "Semiconductor device PN junction fabrication using optical processing of amorphous semiconductor material". United States. https://www.osti.gov/servlets/purl/1164345.
@article{osti_1164345,
title = {Semiconductor device PN junction fabrication using optical processing of amorphous semiconductor material},
author = {Sopori, Bhushan and Rangappan, Anikara},
abstractNote = {Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {11}
}

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