Sintered silver joints via controlled topography of electronic packaging subcomponents
Abstract
Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.
- Inventors:
- Issue Date:
- Research Org.:
- Oak Ridge National Laboratory (ORNL), Oak Ridge, TN (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1154940
- Patent Number(s):
- 8822036
- Application Number:
- 13/787,366
- Assignee:
- UT-Battelle, LLC (Oak Ridge, TN)
- Patent Classifications (CPCs):
-
C - CHEMISTRY C04 - CEMENTS C04B - LIME, MAGNESIA
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- AC05-00OR22725
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 36 MATERIALS SCIENCE
Citation Formats
Wereszczak, Andrew A. Sintered silver joints via controlled topography of electronic packaging subcomponents. United States: N. p., 2014.
Web.
Wereszczak, Andrew A. Sintered silver joints via controlled topography of electronic packaging subcomponents. United States.
Wereszczak, Andrew A. Tue .
"Sintered silver joints via controlled topography of electronic packaging subcomponents". United States. https://www.osti.gov/servlets/purl/1154940.
@article{osti_1154940,
title = {Sintered silver joints via controlled topography of electronic packaging subcomponents},
author = {Wereszczak, Andrew A.},
abstractNote = {Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {9}
}
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Works referencing / citing this record:
Method and apparatus for high temperature semiconductor device packages and structures using a low temperature process
patent, April 2016
- Viswanathan, Lakshminarayan
- US Patent Document 9,312,231
Silver-to-silver bonded IC package having two ceramic substrates exposed on the outside of the package
patent, July 2015
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Silver-to-silver bonded IC package having two ceramic substrates exposed on the outside of the package
patent, March 2015
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