Debugging a high performance computing program

Gooding, Thomas M.

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Title: Debugging a high performance computing program

Abstract

Methods, apparatus, and computer program products are disclosed for debugging a high performance computing program by gathering lists of addresses of calling instructions for a plurality of threads of execution of the program, assigning the threads to groups in dependence upon the addresses, and displaying the groups to identify defective threads.

Inventors:: Gooding, Thomas M.

Issue Date:: 2014-08-19

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1150217

Patent Number(s):: 8813037

Application Number:: 13/780,215

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F11/3636 - {by tracing the execution of the program}
G06F11/3664 - {Environments for testing or debugging software}

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DOE Contract Number:: B519700

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Gooding, Thomas M. Debugging a high performance computing program.  United States: N. p., 2014. 
        Web.

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                    Gooding, Thomas M. Debugging a high performance computing program.  United States.

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                    Gooding, Thomas M. Tue .  
        "Debugging a high performance computing program".  United States.  https://www.osti.gov/servlets/purl/1150217.

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@article{osti_1150217,

  title        = {Debugging a high performance computing program},

  author       = {Gooding, Thomas M.},

  abstractNote = {Methods, apparatus, and computer program products are disclosed for debugging a high performance computing program by gathering lists of addresses of calling instructions for a plurality of threads of execution of the program, assigning the threads to groups in dependence upon the addresses, and displaying the groups to identify defective threads.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2014},

  month        = {8}

}

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Similar Records

Title: Debugging a high performance computing program

Abstract

Citation Formats

Processing system with dual buses patent, January 1981

Fault detection and redundancy management system patent, January 1987

Binary tree parallel processor patent, August 1989

Parallel computer system patent, July 1994

Torus networking method and apparatus having a switch for performing an I/O operation with an external device and changing torus size patent, March 1998

Computer method for updating a network design patent, October 1998

Apparatus region-based detection of interference among reordered memory operations in a processor patent, June 1999

Distributed method and system for excluding components from a restoral route in a communications network patent, August 1999

Integrated management of multiple networks with different topologies patent, September 1999

Method and apparatus for run-time memory access checking and memory leak detection of a multi-threaded program patent, September 1999

System for method for performing a context switch operation in a massively parallel computer system patent, April 2000

Apparatus and methods for connecting modules using remote switching patent, March 2001

Tree network including arrangement for establishing sub-tree having a logical root below the network's physical root patent, September 2002

Method of identifying low quality links in a telecommunications network patent, November 2004

Mesh protection service in a communications network patent, January 2005

Peer-to-peer fault detection patent, April 2005

Selective protection for ring topologies patent, May 2005

Communication network and protocol which can efficiently maintain transmission across a disrupted network patent, June 2005

Routing scheme using preferred paths in a multi-path interconnection fabric in a storage network patent, February 2006

Discovery of nodes in an interconnection fabric patent, April 2006

Application manager for monitoring and recovery of software based application processes patent, April 2006

Message routing in a torus interconnect patent, July 2006

Deterministic error recovery protocol patent, December 2006

Identifying faulty network components during a network exploration patent, April 2007

Fault isolation through no-overhead link level CRC patent, April 2007

Inter-working mesh telecommunications networks patent, October 2007

Directing a path verification request along a specific path to a mesh network switch to test operability of the specific path patent, June 2008

Connection set-up extension for restoration path establishment in mesh networks patent, November 2008

Transferring data in a parallel processing environment patent, December 2008

Network designing device and computer-readable medium patent, March 2009

Multi-directional fault detection system patent, March 2009

Cell boundary fault detection system patent, May 2009

Bisectional fault detection system patent, August 2009

Executing scatter operation to parallel computer nodes by repeatedly broadcasting content of send buffer partition corresponding to each node upon bitwise OR operation patent, October 2009

Locating hardware faults in a data communications network of a parallel computer patent, January 2010

Row fault detection system patent, February 2010

Global tree network for computing structures patent-application, April 2004

Method and system of interconnecting processors of a parallel computer to facilitate torus partitioning patent-application, June 2005

Optimizing layout of an application on a massively parallel supercomputer patent-application, May 2006

Method, system and program product for communicating among processes in a symmetric multi-processing cluster environment patent-application, July 2007

Computer Hardware Fault Diagnosis patent-application, October 2007

Executing an Allgather Operation on a Parallel Computer patent-application, October 2007

Executing a Scatter Operation on a Parallel Computer patent-application, October 2008

Parallel-Prefix Broadcast for a Parallel-Prefix Operation on a Parallel Computer patent-application, October 2008

Fault recovery on a parallel computer system with a torus network patent-application, October 2008

Link Failure Detection in a Parallel Computer patent-application, February 2009

Performing Collective Operations in a Distributed Processing System patent-application, March 2013

An Overview of the BlueGene/L Supercomputer conference, January 2002

Processing system with dual buses
patent, January 1981

Fault detection and redundancy management system
patent, January 1987

Binary tree parallel processor
patent, August 1989

Parallel computer system
patent, July 1994

Torus networking method and apparatus having a switch for performing an I/O operation with an external device and changing torus size
patent, March 1998

Computer method for updating a network design
patent, October 1998

Apparatus region-based detection of interference among reordered memory operations in a processor
patent, June 1999

Distributed method and system for excluding components from a restoral route in a communications network
patent, August 1999

Integrated management of multiple networks with different topologies
patent, September 1999

Method and apparatus for run-time memory access checking and memory leak detection of a multi-threaded program
patent, September 1999

System for method for performing a context switch operation in a massively parallel computer system
patent, April 2000

Apparatus and methods for connecting modules using remote switching
patent, March 2001

Tree network including arrangement for establishing sub-tree having a logical root below the network's physical root
patent, September 2002

Method of identifying low quality links in a telecommunications network
patent, November 2004

Mesh protection service in a communications network
patent, January 2005

Peer-to-peer fault detection
patent, April 2005

Selective protection for ring topologies
patent, May 2005

Communication network and protocol which can efficiently maintain transmission across a disrupted network
patent, June 2005

Routing scheme using preferred paths in a multi-path interconnection fabric in a storage network
patent, February 2006

Discovery of nodes in an interconnection fabric
patent, April 2006

Application manager for monitoring and recovery of software based application processes
patent, April 2006

Message routing in a torus interconnect
patent, July 2006

Deterministic error recovery protocol
patent, December 2006

Identifying faulty network components during a network exploration
patent, April 2007

Fault isolation through no-overhead link level CRC
patent, April 2007

Inter-working mesh telecommunications networks
patent, October 2007

Directing a path verification request along a specific path to a mesh network switch to test operability of the specific path
patent, June 2008

Connection set-up extension for restoration path establishment in mesh networks
patent, November 2008

Transferring data in a parallel processing environment
patent, December 2008

Network designing device and computer-readable medium
patent, March 2009

Multi-directional fault detection system
patent, March 2009

Cell boundary fault detection system
patent, May 2009

Bisectional fault detection system
patent, August 2009

Executing scatter operation to parallel computer nodes by repeatedly broadcasting content of send buffer partition corresponding to each node upon bitwise OR operation
patent, October 2009

Locating hardware faults in a data communications network of a parallel computer
patent, January 2010

Row fault detection system
patent, February 2010

Global tree network for computing structures
patent-application, April 2004

Method and system of interconnecting processors of a parallel computer to facilitate torus partitioning
patent-application, June 2005

Optimizing layout of an application on a massively parallel supercomputer
patent-application, May 2006

Method, system and program product for communicating among processes in a symmetric multi-processing cluster environment
patent-application, July 2007

Computer Hardware Fault Diagnosis
patent-application, October 2007

Executing an Allgather Operation on a Parallel Computer
patent-application, October 2007

Executing a Scatter Operation on a Parallel Computer
patent-application, October 2008

Parallel-Prefix Broadcast for a Parallel-Prefix Operation on a Parallel Computer
patent-application, October 2008

Fault recovery on a parallel computer system with a torus network
patent-application, October 2008

Link Failure Detection in a Parallel Computer
patent-application, February 2009

Performing Collective Operations in a Distributed Processing System
patent-application, March 2013

An Overview of the BlueGene/L Supercomputer
conference, January 2002