Constructing a logical, regular axis topology from an irregular topology
Abstract
Constructing a logical regular topology from an irregular topology including, for each axial dimension and recursively, for each compute node in a subcommunicator until returning to a first node: adding to a logical line of the axial dimension a neighbor specified in a nearest neighbor list; calling the added compute node; determining, by the called node, whether any neighbor in the node's nearest neighbor list is available to add to the logical line; if a neighbor in the called compute node's nearest neighbor list is available to add to the logical line, adding, by the called compute node to the logical line, any neighbor in the called compute node's nearest neighbor list for the axial dimension not already added to the logical line; and, if no neighbor in the called compute node's nearest neighbor list is available to add to the logical line, returning to the calling compute node.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1149607
- Patent Number(s):
- 8788649
- Application Number:
- 13/742,453
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Faraj, Daniel A. Constructing a logical, regular axis topology from an irregular topology. United States: N. p., 2014.
Web.
Faraj, Daniel A. Constructing a logical, regular axis topology from an irregular topology. United States.
Faraj, Daniel A. Tue .
"Constructing a logical, regular axis topology from an irregular topology". United States. https://www.osti.gov/servlets/purl/1149607.
@article{osti_1149607,
title = {Constructing a logical, regular axis topology from an irregular topology},
author = {Faraj, Daniel A.},
abstractNote = {Constructing a logical regular topology from an irregular topology including, for each axial dimension and recursively, for each compute node in a subcommunicator until returning to a first node: adding to a logical line of the axial dimension a neighbor specified in a nearest neighbor list; calling the added compute node; determining, by the called node, whether any neighbor in the node's nearest neighbor list is available to add to the logical line; if a neighbor in the called compute node's nearest neighbor list is available to add to the logical line, adding, by the called compute node to the logical line, any neighbor in the called compute node's nearest neighbor list for the axial dimension not already added to the logical line; and, if no neighbor in the called compute node's nearest neighbor list is available to add to the logical line, returning to the calling compute node.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {7}
}
Works referenced in this record:
Virtual channel assignment in large torus systems
patent, August 2000
- Passint, Randal S.; Thorson, Greg; Galles, Michael B.
- US Patent Document 6,101,181
Storage array interconnection fabric using a torus topology
patent, April 2004
- Lee, Whay Sing; Rettberg, Randall D.; Talagala, Nisha
- US Patent Document 6,718,428
Mapping of nodes in an interconnection fabric
patent, February 2006
- Lee, Whay Sing
- US Patent Document 7,000,033
High performance storage array interconnection fabric using multiple independent paths
patent, July 2008
- Lee, Whay Sing; Rettberg, Randall D.; Talagala, Nisha
- US Patent Document 7,401,161
Constructing A Logical, Regular Axis Topology From An Irregular Topology
patent-application, June 2013
- Faraj, Daniel A.
- US Patent Application 13/309022; 20130145003
Blue Gene system software---Topology mapping for Blue Gene/L supercomputer
conference, January 2006
- Yu, Hao; Chung, I-Hsin; Moreira, Jose
- Proceedings of the 2006 ACM/IEEE conference on Supercomputing - SC '06
Topology Mapping for Blue Gene/L Supercomputer
conference, November 2006
- Yu, Hao; Chung, I-hsin; Moreira, Jose
- ACM/IEEE SC 2006 Conference (SC'06)
Implementing the MPI Process Topology Mechanism
conference, January 2002
- Traff, J. L.
- ACM/IEEE SC 2002 Conference (SC'02)