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Title: Constructing a logical, regular axis topology from an irregular topology

Abstract

Constructing a logical regular topology from an irregular topology including, for each axial dimension and recursively, for each compute node in a subcommunicator until returning to a first node: adding to a logical line of the axial dimension a neighbor specified in a nearest neighbor list; calling the added compute node; determining, by the called node, whether any neighbor in the node's nearest neighbor list is available to add to the logical line; if a neighbor in the called compute node's nearest neighbor list is available to add to the logical line, adding, by the called compute node to the logical line, any neighbor in the called compute node's nearest neighbor list for the axial dimension not already added to the logical line; and, if no neighbor in the called compute node's nearest neighbor list is available to add to the logical line, returning to the calling compute node.

Inventors:
Issue Date:
Research Org.:
International Business Machines Corporation, Armonk, NY (USA).
Sponsoring Org.:
USDOE
OSTI Identifier:
1136402
Patent Number(s):
8,769,074
Application Number:
13/309,022
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Faraj, Daniel A. Constructing a logical, regular axis topology from an irregular topology. United States: N. p., 2014. Web.
Faraj, Daniel A. Constructing a logical, regular axis topology from an irregular topology. United States.
Faraj, Daniel A. Tue . "Constructing a logical, regular axis topology from an irregular topology". United States. https://www.osti.gov/servlets/purl/1136402.
@article{osti_1136402,
title = {Constructing a logical, regular axis topology from an irregular topology},
author = {Faraj, Daniel A.},
abstractNote = {Constructing a logical regular topology from an irregular topology including, for each axial dimension and recursively, for each compute node in a subcommunicator until returning to a first node: adding to a logical line of the axial dimension a neighbor specified in a nearest neighbor list; calling the added compute node; determining, by the called node, whether any neighbor in the node's nearest neighbor list is available to add to the logical line; if a neighbor in the called compute node's nearest neighbor list is available to add to the logical line, adding, by the called compute node to the logical line, any neighbor in the called compute node's nearest neighbor list for the axial dimension not already added to the logical line; and, if no neighbor in the called compute node's nearest neighbor list is available to add to the logical line, returning to the calling compute node.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {7}
}

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Works referenced in this record:

Topology Mapping for Blue Gene/L Supercomputer
conference, November 2006

  • Yu, Hao; Chung, I-hsin; Moreira, Jose
  • ACM/IEEE SC 2006 Conference (SC'06)
  • DOI: 10.1109/SC.2006.63

Implementing the MPI Process Topology Mechanism
conference, January 2002