Full tape thickness feature conductors for EMI structures

Peterson, Kenneth A.; Knudson, Richard T.; Smith, Frank R.; Barner, Gregory

Title: Full tape thickness feature conductors for EMI structures

Abstract

Generally annular full tape thickness conductors are formed in single or multiple tape layers, and then stacked to produce an annular solid conductive wall for enclosing an electromagnetic isolation cavity. The conductors may be formed using punch and fill operations, or by flowing conductor-containing material onto the tape edge surfaces that define the interior sidewalls of the cavity.

Inventors:: Peterson, Kenneth A.; Knudson, Richard T.; Smith, Frank R.; Barner, Gregory

Issue Date:: 2014-06-10

Research Org.:: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1133960

Patent Number(s):: 8747591

Application Number:: 12/833,262

Assignee:: Sandia Corporation (Albuquerque, NM)

Patent Classifications (CPCs):: B - PERFORMING OPERATIONS B05 - SPRAYING OR ATOMISING IN GENERAL B05D - PROCESSES FOR APPLYING LIQUIDS OR OTHER FLUENT MATERIALS TO SURFACES, IN GENERAL

B - PERFORMING OPERATIONS B32 - LAYERED PRODUCTS B32B - LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM

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B - PERFORMING OPERATIONS B05 - SPRAYING OR ATOMISING IN GENERAL B05D - PROCESSES FOR APPLYING LIQUIDS OR OTHER FLUENT MATERIALS TO SURFACES, IN GENERAL
B05D1/32 - using means for protecting parts of a surface not to be coated, e.g. using stencils, resists

B - PERFORMING OPERATIONS B32 - LAYERED PRODUCTS B32B - LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
B32B18/00 - Layered products essentially comprising ceramics, e.g. refractory products
B32B37/18 - involving the assembly of discrete sheets or panels only

C - CHEMISTRY C04 - CEMENTS C04B - LIME, MAGNESIA
C04B2237/32 - Ceramic
C04B2237/86 - Joining of two substrates at their largest surfaces, one surface being complete joined and covered, the other surface not, e.g. a small plate joined at it's largest surface on top of a larger plate

H - ELECTRICITY H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR H05K - PRINTED CIRCUITS
H05K9/0088 - {comprising a plurality of shielding layers

Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10T - TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
Y10T156/1062 - Prior to assembly
Y10T156/1064 - Partial cutting [e.g., grooving or incising]

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DOE Contract Number:: AC04-94AL85000

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 42 ENGINEERING

Citation Formats


                    Peterson, Kenneth A., Knudson, Richard T., Smith, Frank R., and Barner, Gregory. Full tape thickness feature conductors for EMI structures.  United States: N. p., 2014. 
        Web.

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                    Peterson, Kenneth A., Knudson, Richard T., Smith, Frank R., & Barner, Gregory. Full tape thickness feature conductors for EMI structures.  United States.

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                    Peterson, Kenneth A., Knudson, Richard T., Smith, Frank R., and Barner, Gregory. Tue .  
        "Full tape thickness feature conductors for EMI structures".  United States.  https://www.osti.gov/servlets/purl/1133960.

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@article{osti_1133960,

  title        = {Full tape thickness feature conductors for EMI structures},

  author       = {Peterson, Kenneth A. and Knudson, Richard T. and Smith, Frank R. and Barner, Gregory},

  abstractNote = {Generally annular full tape thickness conductors are formed in single or multiple tape layers, and then stacked to produce an annular solid conductive wall for enclosing an electromagnetic isolation cavity. The conductors may be formed using punch and fill operations, or by flowing conductor-containing material onto the tape edge surfaces that define the interior sidewalls of the cavity.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2014},

  month        = {6}

}

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Title: Full tape thickness feature conductors for EMI structures

Abstract

Citation Formats

Electrical circuit using low volume multilayer transmission line devices patent, June 1995

Low temperature co-fired ceramic (LTCC) high density interconnect package with circuitry within the cavity walls patent, October 1995

Antenna array for sensing signals on conductors patent, August 1999

Waveguide with edge grounding patent, June 2000

Miniaturized multilayer ceramic filter with high impedance lines connected to parallel coupled lines patent, September 2000

Image forming apparatus having transfer drum with transfer paper charging member patent, May 2001

Inductor device and process of production thereof patent, March 2002

Laminated ceramic electronic components and manufacturing method therefor patent, May 2004

Ceramic multilayer substrate and method for manufacturing the same patent, November 2005

Method for producing a tube patent, January 2007

Electronic package with improved current carrying capability and method of forming the same patent, August 2008

Method of using sacrificial materials for fabricating internal cavities in laminated dielectric structures patent, February 2009

Temperature compensating device with integral sheet thermistors patent-application, July 2003

Paste for internal electrode and process for producing electronic part patent-application, September 2006

Electrical circuit using low volume multilayer transmission line devices
patent, June 1995

Low temperature co-fired ceramic (LTCC) high density interconnect package with circuitry within the cavity walls
patent, October 1995

Antenna array for sensing signals on conductors
patent, August 1999

Waveguide with edge grounding
patent, June 2000

Miniaturized multilayer ceramic filter with high impedance lines connected to parallel coupled lines
patent, September 2000

Image forming apparatus having transfer drum with transfer paper charging member
patent, May 2001

Inductor device and process of production thereof
patent, March 2002

Laminated ceramic electronic components and manufacturing method therefor
patent, May 2004

Ceramic multilayer substrate and method for manufacturing the same
patent, November 2005

Method for producing a tube
patent, January 2007

Electronic package with improved current carrying capability and method of forming the same
patent, August 2008

Method of using sacrificial materials for fabricating internal cavities in laminated dielectric structures
patent, February 2009

Temperature compensating device with integral sheet thermistors
patent-application, July 2003

Paste for internal electrode and process for producing electronic part
patent-application, September 2006