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Title: Low latency and persistent data storage

Abstract

Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

Inventors:
; ; ;
Issue Date:
Research Org.:
International Business Machines Corporation, Armonk, NY, USA
Sponsoring Org.:
USDOE
OSTI Identifier:
1124642
Patent Number(s):
8,656,130
Application Number:
13/336,287
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Fitch, Blake G, Franceschini, Michele M, Jagmohan, Ashish, and Takken, Todd E. Low latency and persistent data storage. United States: N. p., 2014. Web.
Fitch, Blake G, Franceschini, Michele M, Jagmohan, Ashish, & Takken, Todd E. Low latency and persistent data storage. United States.
Fitch, Blake G, Franceschini, Michele M, Jagmohan, Ashish, and Takken, Todd E. Tue . "Low latency and persistent data storage". United States. https://www.osti.gov/servlets/purl/1124642.
@article{osti_1124642,
title = {Low latency and persistent data storage},
author = {Fitch, Blake G and Franceschini, Michele M and Jagmohan, Ashish and Takken, Todd E},
abstractNote = {Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {2}
}

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