Handling debugger breakpoints in a shared instruction system

Gooding, Thomas Michael; Shok, Richard Michael

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Title: Handling debugger breakpoints in a shared instruction system

Abstract

A debugger debugs processes that execute shared instructions so that a breakpoint set for one process will not cause a breakpoint to occur in the other processes. A breakpoint is set by recording the original instruction at the desired location and writing a trap instruction to the shared instructions at that location. When a process encounters the breakpoint, the process passes control to the debugger for breakpoint processing if the breakpoint was set at that location for that process. If the trap was not set at that location for that process, the cacheline containing the trap is copied to a small scratchpad memory, and the virtual memory mappings are changed to translate the virtual address of the cacheline to the scratchpad. The original instruction is then written to replace the trap instruction in the scratchpad, so that process can execute the instructions in the scatchpad thereby avoiding the trap instruction.

Inventors:: Gooding, Thomas Michael; Shok, Richard Michael

Issue Date:: Tue Jan 21 00:00:00 EST 2014

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1117839

Patent Number(s):: 8635603

Application Number:: 12/255,138

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F11/3648 - {using additional hardware}
G06F9/3812 - {with instruction modification, e.g. store into instruction stream}

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DOE Contract Number:: B554331

Resource Type:: Patent

Resource Relation:: Patent File Date: 2008 Oct 21

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Gooding, Thomas Michael, and Shok, Richard Michael. Handling debugger breakpoints in a shared instruction system.  United States: N. p., 2014. 
        Web.

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                    Gooding, Thomas Michael, & Shok, Richard Michael. Handling debugger breakpoints in a shared instruction system.  United States.

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                    Gooding, Thomas Michael, and Shok, Richard Michael. Tue .  
        "Handling debugger breakpoints in a shared instruction system".  United States.  https://www.osti.gov/servlets/purl/1117839.

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@article{osti_1117839,

  title        = {Handling debugger breakpoints in a shared instruction system},

  author       = {Gooding, Thomas Michael and Shok, Richard Michael},

  abstractNote = {A debugger debugs processes that execute shared instructions so that a breakpoint set for one process will not cause a breakpoint to occur in the other processes. A breakpoint is set by recording the original instruction at the desired location and writing a trap instruction to the shared instructions at that location. When a process encounters the breakpoint, the process passes control to the debugger for breakpoint processing if the breakpoint was set at that location for that process. If the trap was not set at that location for that process, the cacheline containing the trap is copied to a small scratchpad memory, and the virtual memory mappings are changed to translate the virtual address of the cacheline to the scratchpad. The original instruction is then written to replace the trap instruction in the scratchpad, so that process can execute the instructions in the scatchpad thereby avoiding the trap instruction.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Tue Jan 21 00:00:00 EST 2014},

  month        = {Tue Jan 21 00:00:00 EST 2014}

}

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Works referenced in this record:

Program analysis circuitry for multi-tasking industrial controller
patent, April 1997

Schultz, Ronald E.; Rischar, Charles M.; Gunsaulus, Richard S.
US Patent Document 5,619,409
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5619409

Debugging techniques in a multithreaded environment
patent, November 2002

Alverson, Gail A.; Smith, Burton J.; Kaplan, Laurence S.
US Patent Document 6,480,818
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6480818

Method for maintaining cache coherency in software in a shared memory system
patent, August 2005

Hunter, Jeff; Buser, Mark L.; Lee, Bruce
US Patent Document 6,925,634
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6925634

Shared software breakpoints in a shared memory system
patent, January 2006

Hunter, Jeff; Buser, Mark L.; Lee, Bruce
US Patent Document 6,990,657
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6990657

Transparent shared memory access in a software development system
patent, February 2006

Hunter, Jeff; Buser, Mark L.; Lee, Bruce
US Patent Document 7,007,267
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7007267

Software shared memory bus
patent, May 2006

Hunter, Jeff; Buser, Mark L.; Lee, Bruce
US Patent Document 7,039,901
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7039901

Multi-process debugger
patent, April 2008

Gupta, Poorva; Radhakrishnan, Venkatesh
US Patent Document 7,353,498
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7353498

Debugging techniques in a multithreaded environment
patent, September 2008

Alverson, Gail A.; Smith, Burton J.; Kaplan, Laurence S.
US Patent Document 7,428,727
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7428727

System and method for implementing software breakpoints
patent, June 2009

Schultz, Russell Alvin
US Patent Document 7,543,186
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7543186

Method and apparatus for instrumentation in a multiprocessing environment
patent, May 2011

Panchamukhi, Prasanna S.; Soni, Maneesh
US Patent Document 7,950,001
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7950001

Method and system for debugging a program in a multi-thread environment
patent, June 2012

Li, Yan; Yao, Qi; Yu, Weiying
US Patent Document 8,201,152
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8201152

Embedded trace macrocell for enhanced digital signal processor debugging operations
patent, December 2012

Codrescu, Lucian; Anderson, William C.; Venkumahanti, Suresh K.
US Patent Document 8,341,604
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8341604

Non-intrusive, thread-selective, debugging method and system for a multi-thread digital signal processor
patent, February 2013

Codrescu, Lucian; Anderson, William C.; Venkumahanti, Suresh K.
US Patent Document 8,370,806
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8370806

Method and system for instruction stuffing operations during non-intrusive digital signal processor debugging
patent, February 2013

Codrescu, Lucian; Anderson, William C.; Venkumahanti, Suresh K.
US Patent Document 8,380,966
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8380966

Software shared memory bus
patent-application, July 2002

Hunter, Jeff L.; Buser, Mark L.; Lee, Bruce W. C.
US Patent Application 09/998329; 20020100019
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020100019

Method for maintaining cache coherency in software in a shared memory system
patent-application, July 2002

Hunter, Jeff L.; Buser, Mark L.; Lee, Bruce W. C.
US Patent Application 09/998330; 20020100020
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020100020

Transparent shared memory access in a software development system
patent-application, July 2002

Hunter, Jeff L.; Buser, Mark L.; Lee, Bruce W. C.
US Patent Application 09/998755; 20020100021
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020100021

Shared software breakpoints in a shared memory system
patent-application, July 2002

Hunter, Jeff L.; Buser, Mark L.; Lee, Bruce W. C.
US Patent Application 09/998756; 20020100024
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020100024

Debugging techniques in a multithreaded environment
patent-application, February 2005

Alverson, Gail A.; Smith, Burton J.; Kaplan, LAurence S.
US Patent Application 10/937688; 20050034024
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050034024

Multi-process debugger
patent-application, November 2005

Gupta, Poorva; Radhakrishnan, Venkatesh
US Patent Application 10/836013; 20050246688
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050246688

System and method for implementing software breakpoints
patent-application, March 2006

Schultz, Russell A.
US Patent Application 10/939535; 20060069959
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060069959

Method and System fir Instruction Stuffing Operations During Non-Intrusive Digital Signal Processor Debugging
patent-application, May 2008

Codrescu, Lucian; Anderson, William C.; Venkumahanti, Suresh
US Patent Application 11/560344; 20080114972
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080114972

Non-Intrusive, Thread-Selective, Debugging Method and System for a Multi-Thread Digital Signal Processor
patent-application, May 2008

Codrescu, Lucian; Anderson, William C.; Venkumahanti, Suresh
US Patent Application 11/560217; 20080115113
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080115113

Embedded Trace Macrocell for enhanced Digital Signal Processor Debugging Operations
patent-application, May 2008

Codrescu, Lucian; Anderson, William C.; Venkumahanti, Suresh
US Patent Application 11/560339; 20080115115
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080115115

Method and System for Debugging a Program in a Multi-Thread Environment
patent-application, October 2008

Li, Yan; Qi, Yao; Yu, Weiying
US Patent Application 12/110430; 20080270988
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080270988

Method, Computer Program Product , and Hardware Product for Handling Breakpoints in an Asynchronous Debug Model
patent-application, March 2010

Pett, Roger H. E.
US Patent Application 12/206771; 20100064283
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20100064283

Managing Breakpoints in a Multi-Threaded Environment
patent-application, May 2012

Bates, Cary Lee; Buenger, Paul W.; Halverson, Steven Gene
US Patent Application 13/359485; 20120131558
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20120131558

Scratchpad memory: design alternative for cache on-chip memory in embedded systems
conference, January 2002

Banakar, Rajeshwari; Steinke, Stefan; Lee, Bo-Sik
Proceedings of the tenth international symposium on Hardware/software codesign - CODES '02
https://doi.org/10.1145/774789.774805

Works referencing / citing this record:

Method of testing software
patent, April 2017

Miloiu, Dragos; Gheorghe, Alexandru Cosmin; Lazarescu, Radu Theodor
US Patent Document 9,619,368
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/9619368

Method for setting breakpoints, and an integrated circuit and debug tool therefor
patent, February 2017

Robertson, Alistair; Maiolani, Mark
US Patent Document 9,575,758
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/9575758

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Method and apparatus for instrumentation in a multiprocessing environment
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Method and system for debugging a program in a multi-thread environment
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Embedded trace macrocell for enhanced digital signal processor debugging operations
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Non-intrusive, thread-selective, debugging method and system for a multi-thread digital signal processor
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