Die singulation method
Abstract
A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with a HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.
- Inventors:
-
- Albuquerque, NM
- Rio Rancho, NM
- Issue Date:
- Research Org.:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1113978
- Patent Number(s):
- 8623744
- Application Number:
- 13/863,509
- Assignee:
- Sandia Corporation (Albuquerque, NM)
- Patent Classifications (CPCs):
-
B - PERFORMING OPERATIONS B81 - MICROSTRUCTURAL TECHNOLOGY B81C - PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2013 Apr 16
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 36 MATERIALS SCIENCE
Citation Formats
Swiler, Thomas P, Garcia, Ernest J, and Francis, Kathryn M. Die singulation method. United States: N. p., 2014.
Web.
Swiler, Thomas P, Garcia, Ernest J, & Francis, Kathryn M. Die singulation method. United States.
Swiler, Thomas P, Garcia, Ernest J, and Francis, Kathryn M. Tue .
"Die singulation method". United States. https://www.osti.gov/servlets/purl/1113978.
@article{osti_1113978,
title = {Die singulation method},
author = {Swiler, Thomas P and Garcia, Ernest J and Francis, Kathryn M},
abstractNote = {A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with a HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {1}
}
Works referenced in this record:
Die singulation using deep silicon etching
patent, August 2004
- Ruby, Richard C.; Geefay, Frank S.; Han, Cheol Hyun
- US Patent Document 6,777,267
Method for chip singulation
patent, July 2009
- Beyne, Eric; Swinnen, Bart; Vanhaelemeersch, Serge
- US Patent Document 7,566,634
Semiconductor die singulation method
patent, August 2010
- Grivna, Gordon M.
- US Patent Document 7,781,310
Methods relating to singulating semiconductor wafers and wafer scale assemblies
patent-application, April 2006
- Akram, Salman
- US Patent Application 11/282922; 20060079024