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Title: Lattice matched semiconductor growth on crystalline metallic substrates

Abstract

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.

Inventors:
; ;
Issue Date:
Research Org.:
National Renewable Energy Lab. (NREL), Golden, CO (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1107805
Patent Number(s):
8,575,471
Application Number:
12/551,397
Assignee:
Alliance for Sustainable Energy, LLC (Golden, CO) GFO
DOE Contract Number:  
AC36-08GO28308
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE

Citation Formats

Norman, Andrew G, Ptak, Aaron J, and McMahon, William E. Lattice matched semiconductor growth on crystalline metallic substrates. United States: N. p., 2013. Web.
Norman, Andrew G, Ptak, Aaron J, & McMahon, William E. Lattice matched semiconductor growth on crystalline metallic substrates. United States.
Norman, Andrew G, Ptak, Aaron J, and McMahon, William E. Tue . "Lattice matched semiconductor growth on crystalline metallic substrates". United States. https://www.osti.gov/servlets/purl/1107805.
@article{osti_1107805,
title = {Lattice matched semiconductor growth on crystalline metallic substrates},
author = {Norman, Andrew G and Ptak, Aaron J and McMahon, William E},
abstractNote = {Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {11}
}

Patent:

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