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Title: Efficiency of static core turn-off in a system-on-a-chip with variation

Abstract

A processor-implemented method for improving efficiency of a static core turn-off in a multi-core processor with variation, the method comprising: conducting via a simulation a turn-off analysis of the multi-core processor at the multi-core processor's design stage, wherein the turn-off analysis of the multi-core processor at the multi-core processor's design stage includes a first output corresponding to a first multi-core processor core to turn off; conducting a turn-off analysis of the multi-core processor at the multi-core processor's testing stage, wherein the turn-off analysis of the multi-core processor at the multi-core processor's testing stage includes a second output corresponding to a second multi-core processor core to turn off; comparing the first output and the second output to determine if the first output is referring to the same core to turn off as the second output; outputting a third output corresponding to the first multi-core processor core if the first output and the second output are both referring to the same core to turn off.

Inventors:
; ; ; ; ; ; ;
Issue Date:
Research Org.:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org.:
USDOE
OSTI Identifier:
1107625
Patent Number(s):
8,571,847
Application Number:
12/727,984
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING

Citation Formats

Cher, Chen-Yong, Coteus, Paul W, Gara, Alan, Kursun, Eren, Paulsen, David P, Schuelke, Brian A, Sheets, II, John E, and Tian, Shurong. Efficiency of static core turn-off in a system-on-a-chip with variation. United States: N. p., 2013. Web.
Cher, Chen-Yong, Coteus, Paul W, Gara, Alan, Kursun, Eren, Paulsen, David P, Schuelke, Brian A, Sheets, II, John E, & Tian, Shurong. Efficiency of static core turn-off in a system-on-a-chip with variation. United States.
Cher, Chen-Yong, Coteus, Paul W, Gara, Alan, Kursun, Eren, Paulsen, David P, Schuelke, Brian A, Sheets, II, John E, and Tian, Shurong. Tue . "Efficiency of static core turn-off in a system-on-a-chip with variation". United States. https://www.osti.gov/servlets/purl/1107625.
@article{osti_1107625,
title = {Efficiency of static core turn-off in a system-on-a-chip with variation},
author = {Cher, Chen-Yong and Coteus, Paul W and Gara, Alan and Kursun, Eren and Paulsen, David P and Schuelke, Brian A and Sheets, II, John E and Tian, Shurong},
abstractNote = {A processor-implemented method for improving efficiency of a static core turn-off in a multi-core processor with variation, the method comprising: conducting via a simulation a turn-off analysis of the multi-core processor at the multi-core processor's design stage, wherein the turn-off analysis of the multi-core processor at the multi-core processor's design stage includes a first output corresponding to a first multi-core processor core to turn off; conducting a turn-off analysis of the multi-core processor at the multi-core processor's testing stage, wherein the turn-off analysis of the multi-core processor at the multi-core processor's testing stage includes a second output corresponding to a second multi-core processor core to turn off; comparing the first output and the second output to determine if the first output is referring to the same core to turn off as the second output; outputting a third output corresponding to the first multi-core processor core if the first output and the second output are both referring to the same core to turn off.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {10}
}

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