Performing a scatterv operation on a hierarchical tree network optimized for collective operations

Archer, Charles J; Blocksome, Michael A; Ratterman, Joseph D; Smith, Brian E

Title: Performing a scatterv operation on a hierarchical tree network optimized for collective operations

Abstract

Performing a scatterv operation on a hierarchical tree network optimized for collective operations including receiving, by the scatterv module installed on the node, from a nearest neighbor parent above the node a chunk of data having at least a portion of data for the node; maintaining, by the scatterv module installed on the node, the portion of the data for the node; determining, by the scatterv module installed on the node, whether any portions of the data are for a particular nearest neighbor child below the node or one or more other nodes below the particular nearest neighbor child; and sending, by the scatterv module installed on the node, those portions of data to the nearest neighbor child if any portions of the data are for a particular nearest neighbor child below the node or one or more other nodes below the particular nearest neighbor child.

Inventors:: Archer, Charles J; Blocksome, Michael A; Ratterman, Joseph D; Smith, Brian E

Issue Date:: Tue Oct 22 00:00:00 EDT 2013

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1107597

Patent Number(s):: 8565089

Application Number:: 12/748,594

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

Show more

G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F15/17318 - {Parallel communications techniques, e.g. gather, scatter, reduce, roadcast, multicast, all to all}

Show less

DOE Contract Number:: B554331

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, and Smith, Brian E. Performing a scatterv operation on a hierarchical tree network optimized for collective operations.  United States: N. p., 2013. 
        Web.

Copy to clipboard


                    Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, & Smith, Brian E. Performing a scatterv operation on a hierarchical tree network optimized for collective operations.  United States.

Copy to clipboard


                    Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, and Smith, Brian E. Tue .  
        "Performing a scatterv operation on a hierarchical tree network optimized for collective operations".  United States.  https://www.osti.gov/servlets/purl/1107597.

Copy to clipboard


                    
@article{osti_1107597,

  title        = {Performing a scatterv operation on a hierarchical tree network optimized for collective operations},

  author       = {Archer, Charles J and Blocksome, Michael A and Ratterman, Joseph D and Smith, Brian E},

  abstractNote = {Performing a scatterv operation on a hierarchical tree network optimized for collective operations including receiving, by the scatterv module installed on the node, from a nearest neighbor parent above the node a chunk of data having at least a portion of data for the node; maintaining, by the scatterv module installed on the node, the portion of the data for the node; determining, by the scatterv module installed on the node, whether any portions of the data are for a particular nearest neighbor child below the node or one or more other nodes below the particular nearest neighbor child; and sending, by the scatterv module installed on the node, those portions of data to the nearest neighbor child if any portions of the data are for a particular nearest neighbor child below the node or one or more other nodes below the particular nearest neighbor child.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Tue Oct 22 00:00:00 EDT 2013},

  month        = {Tue Oct 22 00:00:00 EDT 2013}

}

Copy to clipboard

Patent:

Save / Share:

Export Metadata

Save to My Library

Works referenced in this record:

Root node redundancy for multipoint-to-multipoint transport trees
patent, November 2010

Wijnands, Ijsbrand; Boers, Arjen; Lo, Alton
US Patent Document 7,835,378
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7835378

Data transfer apparatus and method
patent, October 2005

Yosimoto, Atuyuki; Hayasaka, Kazumi; Saito, Hiroshi
US Patent Document 6,954,806
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6954806

Non-Binary Source-to-Channel Symbol Mappings with Minimized Distortion
patent-application, August 2009

Chan, Ho Yin; Mow, Wai Ho
US Patent Application 12/023750; 20090196361
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090196361

Method, system and computer program product for managing memory in a non-uniform memory access system
patent, September 2001

Stevens, Luis F.
US Patent Document 6,289,424
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6289424

Method and system for pre-pending layer 2 (L2) frame descriptors
patent-application, June 2005

Fan, Kan F.; McDaniel, Scott
US Patent Application 11/009258; 20050135395
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050135395

Correlating Hardware Devices Between Local Operating System and Global Management Entity
patent-application, August 2008

Ritz, Andrew J.; Jodh, Santosh S.; Walker, Ellsworth D.
US Patent Application 11/675261; 20080201603
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080201603

Locating hardware faults in a parallel computer
patent, April 2010

Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.
US Patent Document 7,697,443
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7697443

Method and apparatus for pre-provisioning networks to support fast restoration with minimum overbuild
patent-application, November 2005

Alicherry, Mansoor Ali Khan; Bhatia, Randeep Singh
US Patent Application 10/838098; 20050243711
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050243711

Interleaved all-to-all reliable broadcast on meshes and hypercubes
journal, May 1994

Sunggu Lee, ; Shin, K. G.
IEEE Transactions on Parallel and Distributed Systems, Vol. 5, Issue 5
https://doi.org/10.1109/71.282556

An All-Reduce Operation in Star Networks Using All-to-All Broadcast Communication Pattern
book, January 2005

Oh, Eunseuk; Choi, Hongsik; Primeaux, David
Lecture Notes in Computer Science
https://doi.org/10.1007/11428831_52

Collecting and Aggregating Data Using Distributed Resources
patent-application, October 2009

Yuan, Zhongsheng
US Patent Application 12/058789; 20090248712
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090248712

Class network routing
patent, September 2009

Bhanot, Gyan; Blumrich, Matthias A.; Chen, Dong
US Patent Document 7,587,516
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7587516

Performance analysis and optimization of MPI collective operations on multi-core clusters
journal, April 2009

Tu, Bibo; Fan, Jianping; Zhan, Jianfeng
The Journal of Supercomputing, Vol. 60, Issue 1
https://doi.org/10.1007/s11227-009-0296-3

Reinforced handle assembly for lock
patent, September 2010

Shen, Mu-Lin
US Patent Document 7,793,527
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7793527

Broadcasting A Message In A Parallel Computer
patent-application, September 2009

Berg, Jeremy E.; Faraj, Ahmad A.
US Patent Application 12/053902; 20090240838
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090240838

Performing an allreduce operation on a plurality of compute nodes of a parallel computer
patent, April 2012

Faraj, Ahmad A.
US Patent Document 8,161,268
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8161268

Computing the Hough transform on a scan line array processor (image processing)
journal, March 1989

Fisher, A. L.; Highnam, P. T.
IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 11, Issue 3
https://doi.org/10.1109/34.21795

Method for testing integrated memory using an integrated DMA controller
patent, September 1997

Gittinger, Robert Paul; Spilo, David A.
US Patent Document 5,668,815
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5668815

DMA descriptor queue read and cache write pointer arrangement
patent, February 2009

Pope, Steve L.; Roberts, Derek; Riddoch, David J.
US Patent Document 7,496,699
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7496699

Hierarchical tree-based protection scheme for mesh networks
patent, August 2010

Shah-Heydari, Shahram
US Patent Document 7,774,448
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7774448

Dead reckoning routing of packet data within a network of nodes having generally regular topology
patent, August 2001

Cotter, David; Tatham, Martin C.
US Patent Document 6,272,548
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6272548

Partitioning of processing elements in a SIMD/MIMD array processor
patent, March 1999

Wilkinson, Paul Amba; Dieffenderfer, James Warren; Kogge, Peter M.
US Patent Document 5,878,241
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5878241

Performing process migration with allreduce operations
patent, December 2010

Archer, Charles J.; Peters, Amanda; Wallenfelt, Brian Paul
US Patent Document 7,853,639
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7853639

Apparatus and methods for connecting modules using remote switching
patent-application, February 2002

Carvey, Philip P.; Dally, William J.; Dennison, Larry R.
US Patent Application 09/765138; 20020016901
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020016901

Hierarchical interconnection network architecture for parallel processing, having interconnections between bit-addressible nodes based on address bit permutations
patent, April 1996

Cypher, Robert E.; Sanz, Jorge L. C.
US Patent Document 5,513,371
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5513371

Dynamic load balancing among processors in a parallel computer
patent, September 2001

Hardwick, Jonathan C.
US Patent Document 6,292,822
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6292822

Input/output controller for coupling the processor-memory complex to the fabric in fabric-backplane interprise servers
patent, February 2010

Lovett, Thomas D.; Mehrotra, Sharad; Nicolaou, Cosmos
US Patent Document 7,664,110
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7664110

Performing An Allreduce Operation On A Plurality Of Compute Nodes Of A Parallel Computer
patent-application, November 2009

Faraj, Ahmad
US Patent Application 12/124763; 20090292905
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090292905

Deterministic real time hierarchical distributed computing system
patent, August 2007

Ambuel, Jack
US Patent Document 7,263,598
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7263598

Protocol for self-organizing network using a logical spanning tree backbone
patent, January 2006

Lee, Chung-Chieh; Hester, Lance; O'Dea, Robert J.
US Patent Document 6,982,960
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6982960

System and method for configuring computer applications and devices using inheritance
patent-application, July 2002

Melchione, Daniel; Kouznetsov, Victor
US Patent Application 09/755525; 20020091819
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020091819

Computer hardware fault administration
patent, September 2010

Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.
US Patent Document 7,796,527
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7796527

Efficient content authentication in peer-to-peer networks
patent, July 2011

Tamassia, Roberto; Triandopoulos, Nikolaos
US Patent Document 7,974,221
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7974221

Performing an Allreduce Operation Using Shared Memory
patent-application, December 2008

Archer, Charles J.; Dozsa, Gabor; Ratterman, Joseph D.
US Patent Application 11/754782; 20080301683
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080301683

Hierarchical tree-based protection scheme for mesh networks
patent, April 2007

Shah-Heydari, Shahram
US Patent Document 7,203,743
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7203743

Adaptive congestion control mechanism for modular computer networks
patent, September 1999

Scott, Steven L.; Pribnow, Richard D.; Logghe, Peter G.
US Patent Document 5,958,017
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5958017

Bandwidth Efficient All-reduce Operation on Tree Topologies
conference, March 2007

Patarasuk, Pitch; Yuan, Xin
2007 IEEE International Parallel and Distributed Processing Symposium
https://doi.org/10.1109/IPDPS.2007.370405

System and method for generating object code for map-reduce idioms in multiprocessor systems
patent-application, May 2008

Liao, Shih-wei; Huang, Bo; Chen, Guilin
US Patent Application 11/516292; 20080127146
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080127146

Apparatus and method for controlling direct memory access
patent-application, August 2006

Seong, Shee-Hoon
US Patent Application 11/341787: 20060179181
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060179181

Apparatus, system, and method for reliable, fast, and scalable multicast message delivery in service overlay networks
patent-application, May 2007

Tang, Chunqiang; Chang, Rong Nickle; Ward, Christopher
US Patent Application 11/281792; 20070110063
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070110063

Executing scatter operation to parallel computer nodes by repeatedly broadcasting content of send buffer partition corresponding to each node upon bitwise OR operation
patent, October 2009

Archer, Charles J.; Ratterman, Joseph D.
US Patent Document 7,600,095
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7600095

Signaling completion of a message transfer from an origin compute node to a target compute node
patent, May 2011

Blocksome, Michael A.; Parker, Jeffrey J.
US Patent Document 7,948,999
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7948999

Method and apparatus for storing tree data structures among and within multiple memory channels
patent, April 2008

Rangarajan, Vijay; Maniyar, Shyamsundar N.; Eatherton, William N.
US Patent Document 7,352,739
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7352739

Parallel computing system
patent, December 1999

Maddox, James L.
US Patent Document 6,000,024
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6000024

Multi-use data access descriptor
patent-application, October 2002

Schmisseur, Mark A.
US Patent Application 09/820121; 20020144027
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020144027

Parallel computer system using properties of messages to route them through an interconnect network and to select virtual channel circuits therewithin
patent, April 1999

Yasuda, Yoshiko; Tanaka, Teruo
US Patent Document 5,892,923
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5892923

Configuring compute nodes of a parallel computer in an operational group into a plurality of independent non-overlapping collective networks
patent, March 2010

Archer, Charles J.; Inglett, Todd A.; Ratterman, Joseph D.
US Patent Document 7,673,011
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7673011

Arithmetic functions in torus and tree networks
patent-application, April 2004

Bhanot, Gyan; Blumrich, Matthias A.; Chen, Dong
US Patent Application 10/468991; 20040073590
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20040073590

Optimized Collectives Using a DMA on a Parallel Computer
patent-application, January 2009

Chen, Dong; Gabor, Dozsa; Giampapa, Mark E.
US Patent Application 11/768645; 20090006662
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090006662

Cross-Channel Network Operation Offloading for Collective Operations
patent-application, May 2011

Bloch, Noam; Bloch, Gil; Shachar, Ariel
US Patent Application 12/945904; 20110119673
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20110119673

Method for performing alltoall communication in parallel computers
patent, December 2001

Kureya, Kimihide
US Patent Document 6,334,138
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6334138

Video output controller and video card
patent, July 2005

Amemiya, Jiro; Uesugi, Kouki
US Patent Document 6,914,606
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6914606

Parallel processing method and system using a lazy parallel data type to reduce inter-processor communication
patent, April 2001

Hardwick, Jonathan C.
US Patent Document 6,212,617
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6212617

High-speed, parallel, processor architecture for front-end electronics, based on a single type of ASIC, and method use thereof
patent, August 1999

Crosetto, Dario B.
US Patent Document 5,937,202
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5937202

Inter-computer message routing system with each computer having separate routinng automata for each dimension of the network
patent, April 1992

Flaig, Charles M.; Seitz, Charles L.
US Patent Document 5,105,424
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5105424

System for allocating computing resources of distributed computer system with transaction manager
patent, September 2009

Neiman, Steven; Sulzhyk, Roman
US Patent Document 7,590,983
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7590983

Cluster Computing Support for Application Programs
patent-application, December 2007

Tannenbaum, Zvi; Dauger, Dean E.
US Patent Application 11/744461; 20070288935
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070288935

Computer Hardware Fault Diagnosis
patent-application, October 2007

Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.
US Patent Application 1/279573; 20070242611
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070242611

Executing an Allgather Operation on a Parallel Computer
patent-application, October 2007

Archer, Charles J.; Moreira, JOse F.; Ratterman, Joseph D.
US Patent Application 11/279620; 20070245122
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070245122

Cross-layer design techniques for interference-aware routing configuration in wireless mesh networks
patent, May 2011

Gong, Xiaohong; Hart, Brian D.; Douglas, Bretton
US Patent Document 7,936,681
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7936681

Irregular network
patent-application, November 2003

Dally, William J.; Mann, William F.; Carvey, Philip P.
US Patent Application 10/457718; 20030212877
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20030212877

Hexagonal mesh multiprocessor system
patent, March 1992

Shin, Kang G.; Chen, Ming-Syan; Kandlur, Dilip Dinkar
US Patent Document 5,101,480
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5101480

Computing parallel prefix and reduction using coterie structures
conference, January 1992

Herbordt, M. C.; Weems, C. C.
[1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation, [Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation
https://doi.org/10.1109/FMPC.1992.234895

Distributed processing multi-processor computer
patent-application, September 2003

Bremner, Neale
US Patent Application 10/276634; 20030182376
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20030182376

Universality of mixed action extrapolation formulae
journal, April 2009

Chen, Jiunn-Wei; Walker-Loud, André; O'Connell, Donal
Journal of High Energy Physics, Vol. 2009, Issue 04
https://doi.org/10.1088/1126-6708/2009/04/090

Data gathering/scattering system for a plurality of processors in a parallel computer
patent, November 1998

Kato, Sadaharu; Ishihata, Hiroaki; Horie, Takeshi
US Patent Document 5,832,215
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5832215

Pattern generation and shift plane operations for a mesh connected computer
patent, May 2000

Meeker, Woodrow; Abercrombie, Andrew P.
US Patent Document 6,067,609
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6067609

Method, System, and Program for Handling Input/Output Commands
patent-application, July 2006

Bissessur, Sailesh; Mackey, Richard P.; Schmisseur, Mark A.
US Patent Application 11/279086; 20060168359
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060168359

Parallel Programming Development Environment
patent-application, May 2002

Ladd, Patrick G.
US Patent Application 09/222482; 20020054051
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020054051

Tracking Network Contention
patent-application, June 2009

Archer, Charles J.; Peters, Amanda; Smith, Brian E.
US Patent Application 11/955474; 20090154486
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090154486

Direct memory access controller system with message-based programming
patent-application, July 2005

Clayton, Shawn Adam; Fortin, Brian Mark; Willie, Daniel Brian
US Patent Application 11/088344; 20050165980
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050165980

Routing resource reserve/release protocol for multi-processor computer systems
patent, June 2000

Nugent, Steven F.
US Patent Document 6,076,131
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6076131

Hyperbolic tree space display of computer system monitoring and analysis data
patent, November 2006

Li, Jun; Moore, Keith E.
US Patent Document 7,143,392
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7143392

Method and apparatus for storing tree data structures among and within multiple memory channels
patent, November 2009

Rangarajan, Vijay; Maniyar, Shyamsundar N.; Eatherton, William N.
US Patent Document 7,613,134
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7613134

Method and apparatus for internetworking buffer management
patent, August 2000

Van Seters, Stephen L.; Hauser, Stephen A.; Sankey, Mark A.
US Patent Document 6,108,692
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6108692

Performing Process Migration with Allreduce Operations
patent-application, July 2010

Archer, Charles Jens; Peters, Amanda; Wallenfelt, Brian Paul
US Patent Application 11/531175; 20100185718
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20100185718

Data transfer apparatus and method
patent-application, October 2003

Yosimoto, Atuyuki; Hayasaka, Kazumi; Saito, Hiroshi
US Patent Application 10/400669; 20030188054
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20030188054

Partial broadcast method in parallel computer and a parallel computer suitable therefor
patent, October 1998

Ogata, Yasuhiro; Nakagoshi, Junji; Hamanaka, Naoki
US Patent Document 5,826,049
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5826049

Facilitating intra-node data transfer in collective communications
patent, May 2009

Blackmore, Robert S.; Jia, Bin; Treumann, Richard R.
US Patent Document 7,539,989
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7539989

Virtual private networks within a packet network having a mesh topology
patent-application, May 2005

Ashwood-Smith, Peter
US Patent Application 10/694833; 20050094577
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050094577

Fast restoration mechanism and method of determining minimum restoration capacity in a transmission networks
patent, November 2006

Weis, Bernd
US Patent Document 7,133,359
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7133359

Systems for communicating current and future activity information among mobile internet users and methods therefor
patent, October 2007

Jhanji, Neeraj
US Patent Document 7,284,033
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7284033

Handling potential deadlocks and correctness problems of reduce operations in parallel systems
patent-application, March 2009

Ohly, Patrick; Shumilin, Victor
US Patent Application 11/897480; 20090064176
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090064176

Optimizing threaded MPI execution on SMP clusters
conference, January 2001

Tang, Hong; Yang, Tao
Proceedings of the 15th international conference on Supercomputing - ICS '01
https://doi.org/10.1145/377792.377895

Method and apparatus for the connection of a closed ring through a telephone exchange
patent, December 1987

Nilsson, Olof E.
US Patent Document 4,715,032
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/4715032

Managing Hardware Resources by Sending Messages Amongst Servers in a Data Center
patent-application, July 2011

Mayo, Mark G.; Duncan, James; Candel, Pedro Palazon
US Patent Application 12/696802; 20110179134
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20110179134

Direct memory access transfer reduction method and apparatus to overlay data on to scatter gather descriptors for bus-mastering I/O controllers
patent, November 2003

Connor, Patrick; McVay, Robert
US Patent Document 6,647,438
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6647438

Method and apparatus for controlling (N+I) I/O channels with (N) data managers in a homogenous software programmable environment
patent, January 1999

Carmichael, Richard; Ward, Joel M.; Winchell, Michael A.
US Patent Document 5,864,712
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5864712

Communications network
patent, March 2004

Cotter, David
US Patent Document 6,714,552
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6714552

Abmahnung statt Jobverlust: Kündigung
journal, August 2010

Kaufmann, Stephanie
working@office, Vol. 11, Issue 8
https://doi.org/10.1007/BF03250352

Method and apparatus for wire speed IP multicast forwarding
patent, June 2004

Brown, David A.
US Patent Document 6,754,211
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6754211

Parallel processor system having computing clusters and auxiliary clusters connected with network of partial networks and exchangers
patent, December 1994

Nakagoshi, Junji; Hamanaka, Naoki; Chiba, Hiroyuki
US Patent Document 5,377,333
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5377333

Efficient circuits for out-of-order microprocessors
patent-application, February 2004

Kuszmaul, Bradley C.; Henry-Kuszmaul, Dana Sue
US Patent Application 10/608621; 20040034678
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20040034678

Self-timed mesh routing chip with data broadcasting
patent, July 1994

Dunning, Dave
US Patent Document 5,333,279
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5333279

Extending the message passing interface (MPI)
conference, January 1995

Skjellum, A.; Doss, N. E.; Viswanathan, K.
Proceedings Scalable Parallel Libraries Conference
https://doi.org/10.1109/SPLC.1994.376998

Efficient MPI Collective Operations for Clusters in Long-and-Fast Networks
conference, September 2006

Matsuda, Motohiko; Kudoh, Tomohiro; Kodama, Yuetsu
2006 IEEE International Conference on Cluster Computing
https://doi.org/10.1109/CLUSTR.2006.311848

Dynamic multipoint tree rearrangement
patent, October 2010

Boers, Arjen; Wijnands, Ijsbrand; Vicisano, Lorenzo
US Patent Document 7,808,930
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7808930

Dynamically matching users for group communications based on a threshold degree of matching of sender and recipient predetermined acceptance criteria
patent, November 2002

Olivier, Michael
US Patent Document 6,480,885
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6480885

Apparatus and method for capacity planning for data center server consolidation and workload reassignment
patent-application, March 2008

Neuse, Douglas M.; Matchett, Douglas K.; Walton, Chris
US Patent Application 11/525511; 20080077366
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080077366

Efficient algorithms for all-to-all communications in multiport message-passing systems
journal, January 1997

Bruck, J.; Kipnis, S.
IEEE Transactions on Parallel and Distributed Systems, Vol. 8, Issue 11
https://doi.org/10.1109/71.642949

Parallel processing method
patent, June 1989

Stolfo, Salvatore J.
US Patent Document 4,843,540
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/4843540

Prediction system for RF power distribution
patent, September 1999

Feisullin, Farid; Naylor, Bruce E.; Raukumar, Ajay
US Patent Document 5,949,988
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5949988

Coprocessor design to support MPI primitives in configurable multiprocessors
journal, April 2007

Ziavras, Sotirios G.; Gerbessiotis, Alexandros V.; Bafna, Rohan
Integration, the VLSI Journal, Vol. 40, Issue 3, p. 235-252
https://doi.org/10.1016/j.vlsi.2005.10.001

Communicator-based token/buffer management for eager protocol support in collective communication operations
patent-application, May 2010

Jia, Bin
US Patent Application 12/267730; 20100122268
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20100122268

Message transfer system and method for parallel computer with message transfers being scheduled by skew and roll functions to avoid bottlenecks
patent, April 1997

Heller, Steven K.
US Patent Document 5,617,538
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5617538

Database system providing optimization of group by operator over a union all
patent, February 2004

MacNicol, Roger; Kirk, Steven A.; Li, Xiqing
US Patent Document 6,691,101
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6691101

Mechanism For Process Migration On A Massively Parallel Computer
patent-application, March 2009

Archer, Charles; Darrington, David; McCarthy, Patrick
US Patent Application 11/853927; 20090067334
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090067334

Method of optimizing recognition of collective data movement in a parallel distributed system
patent, October 1998

Ogasawara, Takeshi; Komatsu, Hideaki
US Patent Document 5,822,604
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5822604

Multicomputer memory access architecture
patent, February 1998

Frisch, Robert C.
US Patent Document 5,721,828
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5721828

Parallel processor system with a broadcast message serializing circuit provided within a network
patent, October 1998

Higuchi, Tatsuo; Isobe, Tadaaki; Nakagoshi, Junji
US Patent Document 5,822,605
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5822605

Method and apparatus for zeroing a transfer buffer memory as a background task
patent-application, May 2002

Thompson, Mark J.; Zimmer, Vincent J.
US Patent Application 10/006553; 20020065984
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020065984

System and method for configuration, management, and monitoring of a computer network using inheritance
patent, December 2004

Hanchett, Paul F.
US Patent Document 6,834,301
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6834301

Method and System for Increasing Throughput in a Hierarchical Wireless Network
patent-application, December 2009

Jaim, Praval; Aggarwal, Prashant
US Patent Application 12/176681; 20090310544
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090310544

Development of parallel/distributed applications
patent-application, December 2006

Joublin, Frank; Georick, Christian; Ceravola, Antonello
US Patent Application 11/429383; 20060277323
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060277323

Optimization of MPI collectives on clusters of large-scale SMP's
conference, January 1999

Sistare, Steve; vandeVaart, Rolf; Loh, Eugene
Proceedings of the 1999 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing '99
https://doi.org/10.1145/331532.331555

Method, system and program product for communicating among processes in a symmetric multi-processing cluster environment
patent-application, July 2007

Jia, Bin; Treumann, Richard R.
US Patent Application 11/282011; 20070174558
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070174558

Packet-switched self-routing multistage interconnection network having contention-free fanout, low-loss routing, and fanin buffering to efficiently realize arbitrarily low packet loss
patent, July 1996

Krishnamoorthy, Ashok V.; Kiamilev, Fouad
US Patent Document 5,541,914
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5541914

Method and apparatus for efficient transfer of data packets
patent, May 2004

Hellum, Pål Longva; Kleven, Bjørn Kristian
US Patent Document 6,742,063
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6742063

DADO: A tree-structured machine architecture for production systems
report, March 1982

Stolfo, Salvatore; Shaw, David Elliot
Columbia University, 15 p.
CUCS-24-82
https://doi.org/10.7916/D8SQ97CN

Massively parallel supercomputer
patent, June 2009

Blumrich, Matthias A.; Chen, Dong; Chiu, George Liang-Tai
US Patent Document 7,555,566
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7555566

System and method for automatic generation of a hierarchical tree network and the use of two complementary learning algorithms, optimized for each leaf of the hierarchical tree network
patent, May 2010

Kil, David H.; Pottschmidt, David B.
US Patent Document 7,725,329
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7725329

Similar Records in DOE Patents and OSTI.GOV collections:

Performing optimized collective operations in an irregular subcommunicator of compute nodes in a parallel computer

Patent Davis, Kristan D.; Faraj, Daniel A.

In a parallel computer, performing optimized collective operations in an irregular subcommunicator of compute nodes may be carried out by: identifying, within the irregular subcommunicator, regular neighborhoods of compute nodes; selecting, for each neighborhood from the compute nodes of the neighborhood, a local root node; assigning each local root node to a node of a neighborhood-wide tree topology; mapping, for each neighborhood, the compute nodes of the neighborhood to a local tree topology having, at its root, the local root node of the neighborhood; and performing a one way, rooted collective operation within the subcommunicator including: performing, in one phase,more » « less
Full Text Available
Performing optimized collective operations in a irregular subcommunicator of compute nodes in a parallel computer

Patent Davis, Kristan Suzanne D.; Faraj, Daniel A.

In a parallel computer, performing optimized collective operations in an irregular subcommunicator of compute nodes may be carried out by: identifying, within the irregular subcommunicator, regular neighborhoods of compute nodes; selecting, for each neighborhood from the compute nodes of the neighborhood, a local root node; assigning each local root node to a node of a neighborhood-wide tree topology; mapping, for each neighborhood, the compute nodes of the neighborhood to a local tree topology having, at its root, the local root node of the neighborhood; and performing a one way, rooted collective operation within the subcommunicator including: performing, in one phase,more » « less
Full Text Available
Embedding global and collective in a torus network with message class map based tree path selection

Patent Chen, Dong; Coteus, Paul W.; Eisley, Noel A.; ...

Embodiments of the invention provide a method, system and computer program product for embedding a global barrier and global interrupt network in a parallel computer system organized as a torus network. The computer system includes a multitude of nodes. In one embodiment, the method comprises taking inputs from a set of receivers of the nodes, dividing the inputs from the receivers into a plurality of classes, combining the inputs of each of the classes to obtain a result, and sending said result to a set of senders of the nodes. Embodiments of the invention provide a method, system and computermore » « less
Full Text Available
Global tree network for computing structures enabling global processing operations

Patent Blumrich, ; Matthias, A [Ridgefield, CT]; Chen, Dong [Croton-On-Hudson, NY]; ...

A system and method for enabling high-speed, low-latency global tree network communications among processing nodes interconnected according to a tree network structure. The global tree network enables collective reduction operations to be performed during parallel algorithm operations executing in a computer structure having a plurality of the interconnected processing nodes. Router devices are included that interconnect the nodes of the tree via links to facilitate performance of low-latency global processing operations at nodes of the virtual tree and sub-tree structures. The global operations performed include one or more of: broadcast operations downstream from a root node to leaf nodes ofmore » « less
Full Text Available
Method and apparatus of performing a memory operation in a hierarchical memory assembly

Patent Yudanov, Dmitri

A method and apparatus of performing a memory operation includes receiving a memory operation request at a first memory controller that is in communication with a second memory controller. The first memory controller forwards the memory operation request to the second memory controller. Upon receipt of the memory operation request, the second memory controller provides first information or second information depending on a condition of a pseudo-bank of the second memory controller and a type of the memory operation request.
Full Text Available

Similar Records

Title: Performing a scatterv operation on a hierarchical tree network optimized for collective operations

Abstract

Citation Formats

Root node redundancy for multipoint-to-multipoint transport trees patent, November 2010

Data transfer apparatus and method patent, October 2005

Non-Binary Source-to-Channel Symbol Mappings with Minimized Distortion patent-application, August 2009

Method, system and computer program product for managing memory in a non-uniform memory access system patent, September 2001

Method and system for pre-pending layer 2 (L2) frame descriptors patent-application, June 2005

Correlating Hardware Devices Between Local Operating System and Global Management Entity patent-application, August 2008

Locating hardware faults in a parallel computer patent, April 2010

Method and apparatus for pre-provisioning networks to support fast restoration with minimum overbuild patent-application, November 2005

Interleaved all-to-all reliable broadcast on meshes and hypercubes journal, May 1994

An All-Reduce Operation in Star Networks Using All-to-All Broadcast Communication Pattern book, January 2005

Collecting and Aggregating Data Using Distributed Resources patent-application, October 2009

Class network routing patent, September 2009

Performance analysis and optimization of MPI collective operations on multi-core clusters journal, April 2009

Reinforced handle assembly for lock patent, September 2010

Broadcasting A Message In A Parallel Computer patent-application, September 2009

Performing an allreduce operation on a plurality of compute nodes of a parallel computer patent, April 2012

Computing the Hough transform on a scan line array processor (image processing) journal, March 1989

Method for testing integrated memory using an integrated DMA controller patent, September 1997

DMA descriptor queue read and cache write pointer arrangement patent, February 2009

Hierarchical tree-based protection scheme for mesh networks patent, August 2010

Dead reckoning routing of packet data within a network of nodes having generally regular topology patent, August 2001

Partitioning of processing elements in a SIMD/MIMD array processor patent, March 1999

Performing process migration with allreduce operations patent, December 2010

Apparatus and methods for connecting modules using remote switching patent-application, February 2002

Hierarchical interconnection network architecture for parallel processing, having interconnections between bit-addressible nodes based on address bit permutations patent, April 1996

Dynamic load balancing among processors in a parallel computer patent, September 2001

Input/output controller for coupling the processor-memory complex to the fabric in fabric-backplane interprise servers patent, February 2010

Performing An Allreduce Operation On A Plurality Of Compute Nodes Of A Parallel Computer patent-application, November 2009

Deterministic real time hierarchical distributed computing system patent, August 2007

Protocol for self-organizing network using a logical spanning tree backbone patent, January 2006

System and method for configuring computer applications and devices using inheritance patent-application, July 2002

Computer hardware fault administration patent, September 2010

Efficient content authentication in peer-to-peer networks patent, July 2011

Performing an Allreduce Operation Using Shared Memory patent-application, December 2008

Hierarchical tree-based protection scheme for mesh networks patent, April 2007

Adaptive congestion control mechanism for modular computer networks patent, September 1999

Bandwidth Efficient All-reduce Operation on Tree Topologies conference, March 2007

System and method for generating object code for map-reduce idioms in multiprocessor systems patent-application, May 2008

Apparatus and method for controlling direct memory access patent-application, August 2006

Apparatus, system, and method for reliable, fast, and scalable multicast message delivery in service overlay networks patent-application, May 2007

Executing scatter operation to parallel computer nodes by repeatedly broadcasting content of send buffer partition corresponding to each node upon bitwise OR operation patent, October 2009

Signaling completion of a message transfer from an origin compute node to a target compute node patent, May 2011

Method and apparatus for storing tree data structures among and within multiple memory channels patent, April 2008

Parallel computing system patent, December 1999

Multi-use data access descriptor patent-application, October 2002

Parallel computer system using properties of messages to route them through an interconnect network and to select virtual channel circuits therewithin patent, April 1999

Configuring compute nodes of a parallel computer in an operational group into a plurality of independent non-overlapping collective networks patent, March 2010

Arithmetic functions in torus and tree networks patent-application, April 2004

Optimized Collectives Using a DMA on a Parallel Computer patent-application, January 2009

Cross-Channel Network Operation Offloading for Collective Operations patent-application, May 2011

Method for performing alltoall communication in parallel computers patent, December 2001

Video output controller and video card patent, July 2005

Parallel processing method and system using a lazy parallel data type to reduce inter-processor communication patent, April 2001

High-speed, parallel, processor architecture for front-end electronics, based on a single type of ASIC, and method use thereof patent, August 1999

Inter-computer message routing system with each computer having separate routinng automata for each dimension of the network patent, April 1992

System for allocating computing resources of distributed computer system with transaction manager patent, September 2009

Cluster Computing Support for Application Programs patent-application, December 2007

Computer Hardware Fault Diagnosis patent-application, October 2007

Executing an Allgather Operation on a Parallel Computer patent-application, October 2007

Cross-layer design techniques for interference-aware routing configuration in wireless mesh networks patent, May 2011

Irregular network patent-application, November 2003

Hexagonal mesh multiprocessor system patent, March 1992

Computing parallel prefix and reduction using coterie structures conference, January 1992

Distributed processing multi-processor computer patent-application, September 2003

Universality of mixed action extrapolation formulae journal, April 2009

Data gathering/scattering system for a plurality of processors in a parallel computer patent, November 1998

Pattern generation and shift plane operations for a mesh connected computer patent, May 2000

Method, System, and Program for Handling Input/Output Commands patent-application, July 2006

Parallel Programming Development Environment patent-application, May 2002

Tracking Network Contention patent-application, June 2009

Direct memory access controller system with message-based programming patent-application, July 2005

Routing resource reserve/release protocol for multi-processor computer systems patent, June 2000

Hyperbolic tree space display of computer system monitoring and analysis data patent, November 2006

Method and apparatus for storing tree data structures among and within multiple memory channels patent, November 2009

Method and apparatus for internetworking buffer management patent, August 2000

Performing Process Migration with Allreduce Operations patent-application, July 2010

Data transfer apparatus and method patent-application, October 2003

Root node redundancy for multipoint-to-multipoint transport trees
patent, November 2010

Data transfer apparatus and method
patent, October 2005

Non-Binary Source-to-Channel Symbol Mappings with Minimized Distortion
patent-application, August 2009

Method, system and computer program product for managing memory in a non-uniform memory access system
patent, September 2001

Method and system for pre-pending layer 2 (L2) frame descriptors
patent-application, June 2005

Correlating Hardware Devices Between Local Operating System and Global Management Entity
patent-application, August 2008

Locating hardware faults in a parallel computer
patent, April 2010

Method and apparatus for pre-provisioning networks to support fast restoration with minimum overbuild
patent-application, November 2005

Interleaved all-to-all reliable broadcast on meshes and hypercubes
journal, May 1994

An All-Reduce Operation in Star Networks Using All-to-All Broadcast Communication Pattern
book, January 2005

Collecting and Aggregating Data Using Distributed Resources
patent-application, October 2009

Class network routing
patent, September 2009

Performance analysis and optimization of MPI collective operations on multi-core clusters
journal, April 2009

Reinforced handle assembly for lock
patent, September 2010

Broadcasting A Message In A Parallel Computer
patent-application, September 2009

Performing an allreduce operation on a plurality of compute nodes of a parallel computer
patent, April 2012

Computing the Hough transform on a scan line array processor (image processing)
journal, March 1989

Method for testing integrated memory using an integrated DMA controller
patent, September 1997

DMA descriptor queue read and cache write pointer arrangement
patent, February 2009

Hierarchical tree-based protection scheme for mesh networks
patent, August 2010

Dead reckoning routing of packet data within a network of nodes having generally regular topology
patent, August 2001

Partitioning of processing elements in a SIMD/MIMD array processor
patent, March 1999

Performing process migration with allreduce operations
patent, December 2010

Apparatus and methods for connecting modules using remote switching
patent-application, February 2002

Hierarchical interconnection network architecture for parallel processing, having interconnections between bit-addressible nodes based on address bit permutations
patent, April 1996

Dynamic load balancing among processors in a parallel computer
patent, September 2001

Input/output controller for coupling the processor-memory complex to the fabric in fabric-backplane interprise servers
patent, February 2010

Performing An Allreduce Operation On A Plurality Of Compute Nodes Of A Parallel Computer
patent-application, November 2009

Deterministic real time hierarchical distributed computing system
patent, August 2007

Protocol for self-organizing network using a logical spanning tree backbone
patent, January 2006

System and method for configuring computer applications and devices using inheritance
patent-application, July 2002

Computer hardware fault administration
patent, September 2010

Efficient content authentication in peer-to-peer networks
patent, July 2011

Performing an Allreduce Operation Using Shared Memory
patent-application, December 2008

Hierarchical tree-based protection scheme for mesh networks
patent, April 2007

Adaptive congestion control mechanism for modular computer networks
patent, September 1999

Bandwidth Efficient All-reduce Operation on Tree Topologies
conference, March 2007

System and method for generating object code for map-reduce idioms in multiprocessor systems
patent-application, May 2008

Apparatus and method for controlling direct memory access
patent-application, August 2006

Apparatus, system, and method for reliable, fast, and scalable multicast message delivery in service overlay networks
patent-application, May 2007

Executing scatter operation to parallel computer nodes by repeatedly broadcasting content of send buffer partition corresponding to each node upon bitwise OR operation
patent, October 2009

Signaling completion of a message transfer from an origin compute node to a target compute node
patent, May 2011

Method and apparatus for storing tree data structures among and within multiple memory channels
patent, April 2008

Parallel computing system
patent, December 1999

Multi-use data access descriptor
patent-application, October 2002

Parallel computer system using properties of messages to route them through an interconnect network and to select virtual channel circuits therewithin
patent, April 1999

Configuring compute nodes of a parallel computer in an operational group into a plurality of independent non-overlapping collective networks
patent, March 2010

Arithmetic functions in torus and tree networks
patent-application, April 2004

Optimized Collectives Using a DMA on a Parallel Computer
patent-application, January 2009

Cross-Channel Network Operation Offloading for Collective Operations
patent-application, May 2011

Method for performing alltoall communication in parallel computers
patent, December 2001

Video output controller and video card
patent, July 2005

Parallel processing method and system using a lazy parallel data type to reduce inter-processor communication
patent, April 2001

High-speed, parallel, processor architecture for front-end electronics, based on a single type of ASIC, and method use thereof
patent, August 1999

Inter-computer message routing system with each computer having separate routinng automata for each dimension of the network
patent, April 1992

System for allocating computing resources of distributed computer system with transaction manager
patent, September 2009

Cluster Computing Support for Application Programs
patent-application, December 2007

Computer Hardware Fault Diagnosis
patent-application, October 2007

Executing an Allgather Operation on a Parallel Computer
patent-application, October 2007

Cross-layer design techniques for interference-aware routing configuration in wireless mesh networks
patent, May 2011

Irregular network
patent-application, November 2003

Hexagonal mesh multiprocessor system
patent, March 1992

Computing parallel prefix and reduction using coterie structures
conference, January 1992

Distributed processing multi-processor computer
patent-application, September 2003

Universality of mixed action extrapolation formulae
journal, April 2009

Data gathering/scattering system for a plurality of processors in a parallel computer
patent, November 1998

Pattern generation and shift plane operations for a mesh connected computer
patent, May 2000

Method, System, and Program for Handling Input/Output Commands
patent-application, July 2006

Parallel Programming Development Environment
patent-application, May 2002

Tracking Network Contention
patent-application, June 2009

Direct memory access controller system with message-based programming
patent-application, July 2005

Routing resource reserve/release protocol for multi-processor computer systems
patent, June 2000

Hyperbolic tree space display of computer system monitoring and analysis data
patent, November 2006

Method and apparatus for storing tree data structures among and within multiple memory channels
patent, November 2009

Method and apparatus for internetworking buffer management
patent, August 2000

Performing Process Migration with Allreduce Operations
patent-application, July 2010

Data transfer apparatus and method
patent-application, October 2003

Partial broadcast method in parallel computer and a parallel computer suitable therefor
patent, October 1998

Facilitating intra-node data transfer in collective communications
patent, May 2009

Virtual private networks within a packet network having a mesh topology
patent-application, May 2005