Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components

Cher, Chen-Yong; Coteus, Paul W; Gara, Alan; Kursun, Eren; Paulsen, David P; Schuelke, Brian A; Sheets, John E; Tian, Shurong

Title: Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components

Abstract

A processor-implemented method for determining aging of a processing unit in a processor the method comprising: calculating an effective aging profile for the processing unit wherein the effective aging profile quantifies the effects of aging on the processing unit; combining the effective aging profile with process variation data, actual workload data and operating conditions data for the processing unit; and determining aging through an aging sensor of the processing unit using the effective aging profile, the process variation data, the actual workload data, architectural characteristics and redundancy data, and the operating conditions data for the processing unit.

Inventors:: Cher, Chen-Yong; Coteus, Paul W; Gara, Alan; Kursun, Eren; Paulsen, David P; Schuelke, Brian A; Sheets, II, John E; Tian, Shurong

Issue Date:: 2013-10-01

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1107341

Patent Number(s):: 8549363

Application Number:: 12/727,967

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G01 - MEASURING G01R - MEASURING ELECTRIC VARIABLES

G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G01 - MEASURING G01R - MEASURING ELECTRIC VARIABLES
G01R31/31725 - {Timing aspects, e.g. clock distribution, skew, propagation delay

G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F30/30 - Circuit design

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DOE Contract Number:: B554331

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Cher, Chen-Yong, Coteus, Paul W, Gara, Alan, Kursun, Eren, Paulsen, David P, Schuelke, Brian A, Sheets, II, John E, and Tian, Shurong. Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components.  United States: N. p., 2013. 
        Web.

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                    Cher, Chen-Yong, Coteus, Paul W, Gara, Alan, Kursun, Eren, Paulsen, David P, Schuelke, Brian A, Sheets, II, John E, & Tian, Shurong. Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components.  United States.

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                    Cher, Chen-Yong, Coteus, Paul W, Gara, Alan, Kursun, Eren, Paulsen, David P, Schuelke, Brian A, Sheets, II, John E, and Tian, Shurong. Tue .  
        "Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components".  United States.  https://www.osti.gov/servlets/purl/1107341.

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@article{osti_1107341,

  title        = {Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components},

  author       = {Cher, Chen-Yong and Coteus, Paul W and Gara, Alan and Kursun, Eren and Paulsen, David P and Schuelke, Brian A and Sheets, II, John E and Tian, Shurong},

  abstractNote = {A processor-implemented method for determining aging of a processing unit in a processor the method comprising: calculating an effective aging profile for the processing unit wherein the effective aging profile quantifies the effects of aging on the processing unit; combining the effective aging profile with process variation data, actual workload data and operating conditions data for the processing unit; and determining aging through an aging sensor of the processing unit using the effective aging profile, the process variation data, the actual workload data, architectural characteristics and redundancy data, and the operating conditions data for the processing unit.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2013},

  month        = {10}

}

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Works referenced in this record:

A comprehensive model of PMOS NBTI degradation
journal, January 2005

Alam, M. A.; Mahapatra, S.
Microelectronics Reliability, Vol. 45, Issue 1
https://doi.org/10.1016/j.microrel.2004.03.019

Generalized diffusion-reaction model for the low-field charge-buildup instability at the Si- ${SiO}_{2}$ interface
journal, February 1995

Ogawa, Shigeo; Shiono, Noboru
Physical Review B, Vol. 51, Issue 7
https://doi.org/10.1103/PhysRevB.51.4218

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Title: Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components

Abstract

Citation Formats

A comprehensive model of PMOS NBTI degradation journal, January 2005

Generalized diffusion-reaction model for the low-field charge-buildup instability at the Si- SiO 2 interface journal, February 1995

A comprehensive model of PMOS NBTI degradation
journal, January 2005

Generalized diffusion-reaction model for the low-field charge-buildup instability at the Si- ${SiO}_{2}$ interface
journal, February 1995