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Title: Hardware support for software controlled fast reconfiguration of performance counters

Abstract

Hardware support for software controlled reconfiguration of performance counters may include a plurality of performance counters collecting one or more counts of one or more selected activities. A storage element stores data value representing a time interval, and a timer element reads the data value and detects expiration of the time interval based on the data value and generates a signal. A plurality of configuration registers stores a set of performance counter configurations. A state machine receives the signal and selects a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters.

Inventors:
;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1096001
Patent Number(s):
8543738
Application Number:
13/564,270
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Salapura, Valentina, and Wisniewski, Robert W. Hardware support for software controlled fast reconfiguration of performance counters. United States: N. p., 2013. Web.
Salapura, Valentina, & Wisniewski, Robert W. Hardware support for software controlled fast reconfiguration of performance counters. United States.
Salapura, Valentina, and Wisniewski, Robert W. Tue . "Hardware support for software controlled fast reconfiguration of performance counters". United States. https://www.osti.gov/servlets/purl/1096001.
@article{osti_1096001,
title = {Hardware support for software controlled fast reconfiguration of performance counters},
author = {Salapura, Valentina and Wisniewski, Robert W},
abstractNote = {Hardware support for software controlled reconfiguration of performance counters may include a plurality of performance counters collecting one or more counts of one or more selected activities. A storage element stores data value representing a time interval, and a timer element reads the data value and detects expiration of the time interval based on the data value and generates a signal. A plurality of configuration registers stores a set of performance counter configurations. A state machine receives the signal and selects a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {9}
}

Works referenced in this record:

Method, apparatus and computer program product for efficient, large counts of per thread performance events
patent, August 2005


Afterburner (network-independent card for protocols)
journal, July 1993


A Portable Programming Interface for Performance Evaluation on Modern Processors
journal, August 2000


Implementation-efficient multiple-counter value hardware performance counter
patent, September 2007


Instruction-level characterization of scientific computing applications using hardware performance counters
conference, January 1999


Performance counters controlled by programmable logic
patent, August 2000