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Title: Checkpointing in speculative versioning caches

Abstract

Mechanisms for generating checkpoints in a speculative versioning cache of a data processing system are provided. The mechanisms execute code within the data processing system, wherein the code accesses cache lines in the speculative versioning cache. The mechanisms further determine whether a first condition occurs indicating a need to generate a checkpoint in the speculative versioning cache. The checkpoint is a speculative cache line which is made non-speculative in response to a second condition occurring that requires a roll-back of changes to a cache line corresponding to the speculative cache line. The mechanisms also generate the checkpoint in the speculative versioning cache in response to a determination that the first condition has occurred.

Inventors:
; ; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1093267
Patent Number(s):
8521961
Application Number:
12/544,704
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Eichenberger, Alexandre E, Gara, Alan, Gschwind, Michael K, and Ohmacht, Martin. Checkpointing in speculative versioning caches. United States: N. p., 2013. Web.
Eichenberger, Alexandre E, Gara, Alan, Gschwind, Michael K, & Ohmacht, Martin. Checkpointing in speculative versioning caches. United States.
Eichenberger, Alexandre E, Gara, Alan, Gschwind, Michael K, and Ohmacht, Martin. Tue . "Checkpointing in speculative versioning caches". United States. https://www.osti.gov/servlets/purl/1093267.
@article{osti_1093267,
title = {Checkpointing in speculative versioning caches},
author = {Eichenberger, Alexandre E and Gara, Alan and Gschwind, Michael K and Ohmacht, Martin},
abstractNote = {Mechanisms for generating checkpoints in a speculative versioning cache of a data processing system are provided. The mechanisms execute code within the data processing system, wherein the code accesses cache lines in the speculative versioning cache. The mechanisms further determine whether a first condition occurs indicating a need to generate a checkpoint in the speculative versioning cache. The checkpoint is a speculative cache line which is made non-speculative in response to a second condition occurring that requires a roll-back of changes to a cache line corresponding to the speculative cache line. The mechanisms also generate the checkpoint in the speculative versioning cache in response to a determination that the first condition has occurred.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Aug 27 00:00:00 EDT 2013},
month = {Tue Aug 27 00:00:00 EDT 2013}
}

Works referenced in this record:

Bulk Disambiguation of Speculative Threads in Multiprocessors
journal, May 2006


Low complexity speculative multithreading system based on unmodified microprocessor core
patent, July 2008


Speculative versioning cache
conference, January 1998


Multiple virtual machine system with efficient cache memory design
patent, July 2003


Multi-thread execution method and parallel processor system
patent, July 2006