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Title: Low latency, high bandwidth data communications between compute nodes in a parallel computer

Abstract

Methods, systems, and products are disclosed for data transfers between nodes in a parallel computer that include: receiving, by an origin DMA on an origin node, a buffer identifier for a buffer containing data for transfer to a target node; sending, by the origin DMA to the target node, a RTS message; transferring, by the origin DMA, a data portion to the target node using a memory FIFO operation that specifies one end of the buffer from which to begin transferring the data; receiving, by the origin DMA, an acknowledgement of the RTS message from the target node; and transferring, by the origin DMA in response to receiving the acknowledgement, any remaining data portion to the target node using a direct put operation that specifies the other end of the buffer from which to begin transferring the data, including initiating the direct put operation without invoking an origin processing core.

Inventors:
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1086680
Patent Number(s):
8478834
Application Number:
11/776,718
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Blocksome, Michael A. Low latency, high bandwidth data communications between compute nodes in a parallel computer. United States: N. p., 2013. Web.
Blocksome, Michael A. Low latency, high bandwidth data communications between compute nodes in a parallel computer. United States.
Blocksome, Michael A. Tue . "Low latency, high bandwidth data communications between compute nodes in a parallel computer". United States. https://www.osti.gov/servlets/purl/1086680.
@article{osti_1086680,
title = {Low latency, high bandwidth data communications between compute nodes in a parallel computer},
author = {Blocksome, Michael A},
abstractNote = {Methods, systems, and products are disclosed for data transfers between nodes in a parallel computer that include: receiving, by an origin DMA on an origin node, a buffer identifier for a buffer containing data for transfer to a target node; sending, by the origin DMA to the target node, a RTS message; transferring, by the origin DMA, a data portion to the target node using a memory FIFO operation that specifies one end of the buffer from which to begin transferring the data; receiving, by the origin DMA, an acknowledgement of the RTS message from the target node; and transferring, by the origin DMA in response to receiving the acknowledgement, any remaining data portion to the target node using a direct put operation that specifies the other end of the buffer from which to begin transferring the data, including initiating the direct put operation without invoking an origin processing core.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {7}
}

Works referenced in this record:

A Hardware Acceleration Unit for MPI Queue Processing
conference, January 2005


The impact of MPI queue usage on message latency
conference, January 2004


An analysis of NIC resource usage for offloading MPI
conference, January 2004


The Blue Gene/L Supercomputer: A Hardware and Software Story
journal, May 2007