Generating code adapted for interlinking legacy scalar code and extended vector code

Gschwind, Michael K

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Title: Generating code adapted for interlinking legacy scalar code and extended vector code

Abstract

Mechanisms for intermixing code are provided. Source code is received for compilation using an extended Application Binary Interface (ABI) that extends a legacy ABI and uses a different register configuration than the legacy ABI. First compiled code is generated based on the source code, the first compiled code comprising code for accommodating the difference in register configurations used by the extended ABI and the legacy ABI. The first compiled code and second compiled code are intermixed to generate intermixed code, the second compiled code being compiled code that uses the legacy ABI. The intermixed code comprises at least one call instruction that is one of a call from the first compiled code to the second compiled code or a call from the second compiled code to the first compiled code. The code for accommodating the difference in register configurations is associated with the at least one call instruction.

Inventors:: Gschwind, Michael K

Issue Date:: 2013-06-04

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1084345

Patent Number(s):: 8458677

Application Number:: 12/544,258

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F8/447 - {Target code generation}

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DOE Contract Number:: B554331

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Gschwind, Michael K. Generating code adapted for interlinking legacy scalar code and extended vector code.  United States: N. p., 2013. 
        Web.

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                    Gschwind, Michael K. Generating code adapted for interlinking legacy scalar code and extended vector code.  United States.

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                    Gschwind, Michael K. Tue .  
        "Generating code adapted for interlinking legacy scalar code and extended vector code".  United States.  https://www.osti.gov/servlets/purl/1084345.

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@article{osti_1084345,

  title        = {Generating code adapted for interlinking legacy scalar code and extended vector code},

  author       = {Gschwind, Michael K},

  abstractNote = {Mechanisms for intermixing code are provided. Source code is received for compilation using an extended Application Binary Interface (ABI) that extends a legacy ABI and uses a different register configuration than the legacy ABI. First compiled code is generated based on the source code, the first compiled code comprising code for accommodating the difference in register configurations used by the extended ABI and the legacy ABI. The first compiled code and second compiled code are intermixed to generate intermixed code, the second compiled code being compiled code that uses the legacy ABI. The intermixed code comprises at least one call instruction that is one of a call from the first compiled code to the second compiled code or a call from the second compiled code to the first compiled code. The code for accommodating the difference in register configurations is associated with the at least one call instruction.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2013},

  month        = {6}

}

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Works referenced in this record:

Achieving optimum coded diversity with scalar codes
journal, July 2001

Ganesan, G.; Stoica, P.
IEEE Transactions on Information Theory, Vol. 47, Issue 5
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Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier in vector instruction
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Barlow, Stephen; Bailey, Neil; Ramsdale, Timothy
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Language independent optimal size-based storage allocation
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Gschwind, Michael K.; Hofstee, Harm Peter; Hopkins, Martin E.
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Linking scalar results directly to scalar operation inputs on a bidirectional databus in a computer which superpositions vector and scalar operations
patent, June 1989

Cook, Erick M.; Phelps, Andrew Everett; Potash, Hanan
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Scalar/Vector Processor
patent-application, October 2005

Van Berkel, Cornelis Hermanus; Meuwissen, Patrick Peter Elizabeth; Engin, Nur
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Similar Records

Title: Generating code adapted for interlinking legacy scalar code and extended vector code

Abstract

Citation Formats

Achieving optimum coded diversity with scalar codes journal, July 2001

Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier in vector instruction patent, March 2008

Language independent optimal size-based storage allocation patent, August 1999

Method and arrangement for pattern recognition on the basis of statistics patent, March 2001

SIMD datapath coupled to scalar/vector/address/conditional data register file with selective subpath scalar processing mode patent, January 2005

Linking scalar results directly to scalar operation inputs on a bidirectional databus in a computer which superpositions vector and scalar operations patent, June 1989

Wide instruction word architecture central processor patent, May 1995

Scalar/Vector Processor patent-application, October 2005

Method and apparatus for the inter-operation of differing architectural and run time conventions patent, March 2001

Achieving optimum coded diversity with scalar codes
journal, July 2001

Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier in vector instruction
patent, March 2008

Language independent optimal size-based storage allocation
patent, August 1999

Method and arrangement for pattern recognition on the basis of statistics
patent, March 2001

SIMD datapath coupled to scalar/vector/address/conditional data register file with selective subpath scalar processing mode
patent, January 2005

Linking scalar results directly to scalar operation inputs on a bidirectional databus in a computer which superpositions vector and scalar operations
patent, June 1989

Wide instruction word architecture central processor
patent, May 1995

Scalar/Vector Processor
patent-application, October 2005

Method and apparatus for the inter-operation of differing architectural and run time conventions
patent, March 2001