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Title: Die singulation method

Abstract

A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with an HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.

Inventors:
; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1084249
Patent Number(s):
8461023
Application Number:
12/758,838
Assignee:
Sandia Corporation (Albuquerque, NM)
Patent Classifications (CPCs):
B - PERFORMING OPERATIONS B81 - MICROSTRUCTURAL TECHNOLOGY B81C - PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY

Citation Formats

Swiler, Thomas P., Garcia, Ernest J., and Francis, Kathryn M. Die singulation method. United States: N. p., 2013. Web.
Swiler, Thomas P., Garcia, Ernest J., & Francis, Kathryn M. Die singulation method. United States.
Swiler, Thomas P., Garcia, Ernest J., and Francis, Kathryn M. Tue . "Die singulation method". United States. https://www.osti.gov/servlets/purl/1084249.
@article{osti_1084249,
title = {Die singulation method},
author = {Swiler, Thomas P. and Garcia, Ernest J. and Francis, Kathryn M.},
abstractNote = {A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with an HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jun 11 00:00:00 EDT 2013},
month = {Tue Jun 11 00:00:00 EDT 2013}
}

Works referenced in this record:

Method for precision integrated circuit die singulation using differential etch rates
patent, February 2008


Ultra-thin die and method of fabricating same
patent, March 2009


Advanced Dicing Technology for Semiconductor Wafer—Stealth Dicing
journal, January 2007


Die singulation using deep silicon etching
patent, August 2004


Semiconductor die singulation method
patent, August 2010


Method of anisotropically etching silicon
patent, March 1996


Method for chip singulation
patent, July 2009