Arbitration in crossbar interconnect for low latency
Abstract
A system and method and computer program product for reducing the latency of signals communicated through a crossbar switch, the method including using at slave arbitration logic devices associated with Slave devices for which access is requested from one or more Master devices, two or more priority vector signals cycled among their use every clock cycle for selecting one of the requesting Master devices and updates the respective priority vector signal used every clock cycle. Similarly, each Master for which access is requested from one or more Slave devices, can have two or more priority vectors and can cycle among their use every clock cycle to further reduce latency and increase throughput performance via the crossbar.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1083210
- Patent Number(s):
- 8370551
- Application Number:
- 12/684,287
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Ohmacht, Martin, and Sugavanam, Krishnan. Arbitration in crossbar interconnect for low latency. United States: N. p., 2013.
Web.
Ohmacht, Martin, & Sugavanam, Krishnan. Arbitration in crossbar interconnect for low latency. United States.
Ohmacht, Martin, and Sugavanam, Krishnan. Tue .
"Arbitration in crossbar interconnect for low latency". United States. https://www.osti.gov/servlets/purl/1083210.
@article{osti_1083210,
title = {Arbitration in crossbar interconnect for low latency},
author = {Ohmacht, Martin and Sugavanam, Krishnan},
abstractNote = {A system and method and computer program product for reducing the latency of signals communicated through a crossbar switch, the method including using at slave arbitration logic devices associated with Slave devices for which access is requested from one or more Master devices, two or more priority vector signals cycled among their use every clock cycle for selecting one of the requesting Master devices and updates the respective priority vector signal used every clock cycle. Similarly, each Master for which access is requested from one or more Slave devices, can have two or more priority vectors and can cycle among their use every clock cycle to further reduce latency and increase throughput performance via the crossbar.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {2}
}
Save to My Library
You must Sign In or Create an Account in order to save documents to your library.