Arbitration in crossbar interconnect for low latency
Abstract
A system and method and computer program product for reducing the latency of signals communicated through a crossbar switch, the method including using at slave arbitration logic devices associated with Slave devices for which access is requested from one or more Master devices, two or more priority vector signals cycled among their use every clock cycle for selecting one of the requesting Master devices and updates the respective priority vector signal used every clock cycle. Similarly, each Master for which access is requested from one or more Slave devices, can have two or more priority vectors and can cycle among their use every clock cycle to further reduce latency and increase throughput performance via the crossbar.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1083210
- Patent Number(s):
- 8370551
- Application Number:
- 12/684,287
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Ohmacht, Martin, and Sugavanam, Krishnan. Arbitration in crossbar interconnect for low latency. United States: N. p., 2013.
Web.
Ohmacht, Martin, & Sugavanam, Krishnan. Arbitration in crossbar interconnect for low latency. United States.
Ohmacht, Martin, and Sugavanam, Krishnan. Tue .
"Arbitration in crossbar interconnect for low latency". United States. https://www.osti.gov/servlets/purl/1083210.
@article{osti_1083210,
title = {Arbitration in crossbar interconnect for low latency},
author = {Ohmacht, Martin and Sugavanam, Krishnan},
abstractNote = {A system and method and computer program product for reducing the latency of signals communicated through a crossbar switch, the method including using at slave arbitration logic devices associated with Slave devices for which access is requested from one or more Master devices, two or more priority vector signals cycled among their use every clock cycle for selecting one of the requesting Master devices and updates the respective priority vector signal used every clock cycle. Similarly, each Master for which access is requested from one or more Slave devices, can have two or more priority vectors and can cycle among their use every clock cycle to further reduce latency and increase throughput performance via the crossbar.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {2}
}
Works referenced in this record:
Multi-master bus arbitration system in which the address and data lines of the bus may be separately granted to individual masters
patent, September 1996
- Zeller, Charles; Durkin, Michael D.; Holman, Thomas
- US Patent Document 5,555,425
Shared access control device for integrated system with multiple functional units accessing external structures over multiple data buses
patent, March 2000
- Foster, Eric M.; Franklin, Dennis E.; Jackowski, Stefan P.
- US Patent Document 6,038,630
Method and apparatus for allocating bus access rights in multimaster bus systems
patent, May 2008
- Hellwig, Frank; Konig, Dietmar
- US Patent Document 7,373,445
Hierarchical bus structure and memory access protocol for multiprocessor systems
patent, December 2008
- Hobson, Richard F.; Ressl, Bill; Dyck, Allan R.
- US Patent Document 7,469,308
Device control register for a processor block
patent, June 2010
- Ansari, Ahmad R.; Li, Kam-Wing
- US Patent Document 7,737,725
Processor local bus bridge for an embedded processor block core in an integrated circuit
patent, August 2011
- Li, Kam-Wing; Appelbaum, Jeffery H.; Ansari, Ahmad R.
- US Patent Document 8,006,021
Method and system for controlling transmission and execution of commands in an integrated circuit device
patent, April 2012
- Moran, Christine E.; Akers, Matthew D.; Pagan, Annette
- US Patent Document 8,156,273
Arbiter having programmable arbitration points for undefined length burst accesses and method
patent-application, March 2005
- Murdock, Brett W.; Moyer, William C.
- US Patent Application 10/660845; 20050060455
Method of accessing memory via multiple slave ports
patent-application, December 2005
- Fitzsimmons, Michael D.; Moyer, William C.; Murdock, Brett W.
- US Patent Application 11/203935; 20050273544
Data processing system with bus access retraction
patent-application, March 2006
- Moyer, William C.; Murdock, Brett W.
- US Patent Application 10/955558; 20060069839
Plural bus arbitrations per cycle via higher-frequency arbiter
patent-application, August 2006
- Ganasan, Jaya Prakash Subramaniam
- US Patent Application 11/066507; 20060190649
Memory and Memory Communication System
patent-application, December 2007
- Klein, Christian; Linz, Stefan; Reinig, Helmut
- US Patent Application 11/754854; 20070283077
Communication infrastructure for a data processing apparatus and a method of operation of such a communication infrastructure
patent-application, February 2011
- Feero, Brett Stanley; Riocreux, Peter Andrew; Tune, Andrew David
- US Patent Application 12/461345; 20110035523
Works referencing / citing this record:
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551
Arbitration in crossbar interconnect for low latency
patent, February 2013
- Ohmacht, Martin; Sugavanam, Krishnan
- US Patent Document 8,370,551