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Title: Low latency, high bandwidth data communications between compute nodes in a parallel computer

Abstract

Methods, parallel computers, and computer program products are disclosed for low latency, high bandwidth data communications between compute nodes in a parallel computer. Embodiments include receiving, by an origin direct memory access (`DMA`) engine of an origin compute node, data for transfer to a target compute node; sending, by the origin DMA engine of the origin compute node to a target DMA engine on the target compute node, a request to send (`RTS`) message; transferring, by the origin DMA engine, a predetermined portion of the data to the target compute node using memory FIFO operation; determining, by the origin DMA engine whether an acknowledgement of the RTS message has been received from the target DMA engine; if the an acknowledgement of the RTS message has not been received, transferring, by the origin DMA engine, another predetermined portion of the data to the target compute node using a memory FIFO operation; and if the acknowledgement of the RTS message has been received by the origin DMA engine, transferring, by the origin DMA engine, any remaining portion of the data to the target compute node using a direct put operation.

Inventors:
 [1];  [1];  [1];  [1]
  1. Rochester, MN
Issue Date:
Research Org.:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org.:
USDOE
OSTI Identifier:
1017454
Patent Number(s):
7,827,024
Application Number:
11/746,333
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English

Citation Formats

Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, and Smith, Brian E. Low latency, high bandwidth data communications between compute nodes in a parallel computer. United States: N. p., 2010. Web.
Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, & Smith, Brian E. Low latency, high bandwidth data communications between compute nodes in a parallel computer. United States.
Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, and Smith, Brian E. Tue . "Low latency, high bandwidth data communications between compute nodes in a parallel computer". United States. https://www.osti.gov/servlets/purl/1017454.
@article{osti_1017454,
title = {Low latency, high bandwidth data communications between compute nodes in a parallel computer},
author = {Archer, Charles J and Blocksome, Michael A and Ratterman, Joseph D and Smith, Brian E},
abstractNote = {Methods, parallel computers, and computer program products are disclosed for low latency, high bandwidth data communications between compute nodes in a parallel computer. Embodiments include receiving, by an origin direct memory access (`DMA`) engine of an origin compute node, data for transfer to a target compute node; sending, by the origin DMA engine of the origin compute node to a target DMA engine on the target compute node, a request to send (`RTS`) message; transferring, by the origin DMA engine, a predetermined portion of the data to the target compute node using memory FIFO operation; determining, by the origin DMA engine whether an acknowledgement of the RTS message has been received from the target DMA engine; if the an acknowledgement of the RTS message has not been received, transferring, by the origin DMA engine, another predetermined portion of the data to the target compute node using a memory FIFO operation; and if the acknowledgement of the RTS message has been received by the origin DMA engine, transferring, by the origin DMA engine, any remaining portion of the data to the target compute node using a direct put operation.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2010},
month = {11}
}

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