Method and apparatus for single-stepping coherence events in a multiprocessor system under software control

Blumrich, Matthias A; Salapura, Valentina

Advanced Search OptionsAdvanced Search queries use a traditional Term Search. For more info, see our FAQ.

All Fields:

Patent Title:

Abstract:

Assignee:

Inventor(s):

Patent Number:

Patent Classification (CPC):

All Classifications
A - human necessities
A01 - agriculture
A21 - baking
A22 - butchering
A23 - foods or foodstuffs
A24 - tobacco
A41 - wearing apparel
A42 - headwear
A43 - footwear
A44 - haberdashery
A45 - hand or travelling articles
A46 - brushware
A47 - furniture
A61 - medical or veterinary science
A62 - life-saving
A63 - sports
A99 - subject matter not otherwise provided for in this section
B - performing operations
B01 - physical or chemical processes or apparatus in general
B02 - crushing, pulverising, or disintegrating
B03 - separation of solid materials using liquids or using pneumatic tables or jigs
B04 - centrifugal apparatus or machines for carrying-out physical or chemical processes
B05 - spraying or atomising in general
B06 - generating or transmitting mechanical vibrations in general
B07 - separating solids from solids
B08 - cleaning
B09 - disposal of solid waste
B21 - mechanical metal-working without essentially removing material
B22 - casting
B23 - machine tools
B24 - grinding
B25 - hand tools
B26 - hand cutting tools
B27 - working or preserving wood or similar material
B28 - working cement, clay, or stone
B29 - working of plastics
B30 - presses
B31 - making articles of paper, cardboard or material worked in a manner analogous to paper
B32 - layered products
B33 - additive manufacturing technology
B41 - printing
B42 - bookbinding
B43 - writing or drawing implements
B44 - decorative arts
B60 - vehicles in general
B61 - railways
B62 - land vehicles for travelling otherwise than on rails
B63 - ships or other waterborne vessels
B64 - aircraft
B65 - conveying
B66 - hoisting
B67 - opening, closing {or cleaning} bottles, jars or similar containers
B68 - saddlery
B81 - microstructural technology
B82 - nanotechnology
B99 - subject matter not otherwise provided for in this section
C - chemistry
C01 - inorganic chemistry
C02 - treatment of water, waste water, sewage, or sludge
C03 - glass
C04 - cements
C05 - fertilisers
C06 - explosives
C07 - organic chemistry
C08 - organic macromolecular compounds
C09 - dyes
C10 - petroleum, gas or coke industries
C11 - animal or vegetable oils, fats, fatty substances or waxes
C12 - biochemistry
C13 - sugar industry
C14 - skins
C21 - metallurgy of iron
C22 - metallurgy
C23 - coating metallic material
C25 - electrolytic or electrophoretic processes
C30 - crystal growth
C40 - combinatorial technology
C99 - subject matter not otherwise provided for in this section
D - textiles
D01 - natural or man-made threads or fibres
D02 - yarns
D03 - weaving
D04 - braiding
D05 - sewing
D06 - treatment of textiles or the like
D07 - ropes
D10 - indexing scheme associated with sublasses of section d, relating to textiles
D21 - paper-making
D99 - subject matter not otherwise provided for in this section
E - fixed constructions
E01 - construction of roads, railways, or bridges
E02 - hydraulic engineering
E03 - water supply
E04 - building
E05 - locks
E06 - doors, windows, shutters, or roller blinds in general
E21 - earth drilling
E99 - subject matter not otherwise provided for in this section
F - mechanical engineering
F01 - machines or engines in general
F02 - combustion engines
F03 - machines or engines for liquids
F04 - positive - displacement machines for liquids
F05 - indexing schemes relating to engines or pumps in various subclasses of classes f01-f04
F15 - fluid-pressure actuators
F16 - engineering elements and units
F17 - storing or distributing gases or liquids
F21 - lighting
F22 - steam generation
F23 - combustion apparatus
F24 - heating
F25 - refrigeration or cooling
F26 - drying
F27 - furnaces
F28 - heat exchange in general
F41 - weapons
F42 - ammunition
F99 - subject matter not otherwise provided for in this section
G - physics
G01 - measuring
G02 - optics
G03 - photography
G04 - horology
G05 - controlling
G06 - computing
G07 - checking-devices
G08 - signalling
G09 - education
G10 - musical instruments
G11 - information storage
G12 - instrument details
G16 - information and communication technology [ict] specially adapted for specific application fields
G21 - nuclear physics
G99 - subject matter not otherwise provided for in this section
H - electricity
H01 - basic electric elements
H02 - generation
H03 - basic electronic circuitry
H04 - electric communication technique
H05 - electric techniques not otherwise provided for
H99 - subject matter not otherwise provided for in this section
Y - new / cross sectional technologies
Y02 - technologies or applications for mitigation or adaptation against climate change
Y04 - information or communication technologies having an impact on other technology areas
Y10 - technical subjects covered by former uspc

More Options ...

Title: Method and apparatus for single-stepping coherence events in a multiprocessor system under software control

Abstract

An apparatus and method are disclosed for single-stepping coherence events in a multiprocessor system under software control in order to monitor the behavior of a memory coherence mechanism. Single-stepping coherence events in a multiprocessor system is made possible by adding one or more step registers. By accessing these step registers, one or more coherence requests are processed by the multiprocessor system. The step registers determine if the snoop unit will operate by proceeding in a normal execution mode, or operate in a single-step mode.

Inventors:

Blumrich, Matthias A ^[1]; Salapura, Valentina ^[2]

Ridgefield, CT
Chappaqua, NY

Issue Date:: 2010-11-02

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1017452

Patent Number(s):: 7827391

Application Number:: 11/768,857

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

Show more

G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F11/3636 - {by tracing the execution of the program}
G06F12/0831 - using a bus scheme, e.g. with bus monitoring or watching means

Show less

DOE Contract Number:: B554331

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Citation Formats


                    Blumrich, Matthias A, and Salapura, Valentina. Method and apparatus for single-stepping coherence events in a multiprocessor system under software control.  United States: N. p., 2010. 
        Web.

Copy to clipboard


                    Blumrich, Matthias A, & Salapura, Valentina. Method and apparatus for single-stepping coherence events in a multiprocessor system under software control.  United States.

Copy to clipboard


                    Blumrich, Matthias A, and Salapura, Valentina. Tue .  
        "Method and apparatus for single-stepping coherence events in a multiprocessor system under software control".  United States.  https://www.osti.gov/servlets/purl/1017452.

Copy to clipboard


                    
@article{osti_1017452,

  title        = {Method and apparatus for single-stepping coherence events in a multiprocessor system under software control},

  author       = {Blumrich, Matthias A and Salapura, Valentina},

  abstractNote = {An apparatus and method are disclosed for single-stepping coherence events in a multiprocessor system under software control in order to monitor the behavior of a memory coherence mechanism. Single-stepping coherence events in a multiprocessor system is made possible by adding one or more step registers. By accessing these step registers, one or more coherence requests are processed by the multiprocessor system. The step registers determine if the snoop unit will operate by proceeding in a normal execution mode, or operate in a single-step mode.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2010},

  month        = {11}

}

Copy to clipboard

Patent:

Save / Share:

Export Metadata

Save to My Library

Works referenced in this record:

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
journal, August 2005

Pande, P. P.; Grecu, C.; Jones, M.
IEEE Transactions on Computers, Vol. 54, Issue 8
https://doi.org/10.1109/TC.2005.134

Directory-based cache coherence in large-scale multiprocessors
journal, June 1990

Chaiken, D.; Fields, C.; Kurihara, K.
Computer, Vol. 23, Issue 6
https://doi.org/10.1109/2.55500

Performance evaluation of adaptive MPI
conference, January 2006

Huang, Chao; Zheng, Gengbin; Kalé, Laxmikant
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '06
https://doi.org/10.1145/1122971.1122976

Synchronization, coherence, and event ordering in multiprocessors
journal, February 1988

Dubois, M.; Scheurich, C.; Briggs, F. A.
Computer, Vol. 21, Issue 2
https://doi.org/10.1109/2.15

Overview of the Blue Gene/L system architecture
journal, March 2005

Gara, A.; Blumrich, M. A.; Chen, D.
IBM Journal of Research and Development, Vol. 49, Issue 2.3
https://doi.org/10.1147/rd.492.0195

Optimization of MPI collective communication on BlueGene/L systems
conference, January 2005

Almási, George; Heidelberger, Philip; Archer, Charles J.
Proceedings of the 19th annual international conference on Supercomputing - ICS '05
https://doi.org/10.1145/1088149.1088183

Intel 870: a building block for cost-effective, scalable servers
journal, March 2002

Briggs, F.; Cekleov, M.; Creta, K.
IEEE Micro, Vol. 22, Issue 2
https://doi.org/10.1109/MM.2002.997878

Blue Gene/L advanced diagnostics environment
journal, March 2005

Giampapa, M. E.; Bellofatto, R.; Blumrich, M. A.
IBM Journal of Research and Development, Vol. 49, Issue 2.3
https://doi.org/10.1147/rd.492.0319

Similar Records in DOE Patents and OSTI.GOV collections:

Method and apparatus for control of coherent synchrotron radiation effects during recirculation with bunch compression

Patent Douglas, David R; Tennant, Christopher

A modulated-bending recirculating system that avoids CSR-driven breakdown in emittance compensation by redistributing the bending along the beamline. The modulated-bending recirculating system includes a) larger angles of bending in initial FODO cells, thereby enhancing the impact of CSR early on in the beam line while the bunch is long, and 2) a decreased bending angle in the final FODO cells, reducing the effect of CSR while the bunch is short. The invention describes a method for controlling the effects of CSR during recirculation and bunch compression including a) correcting chromatic aberrations, b) correcting lattice and CSR-induced curvature in the longitudinalmore » « less
Full Text Available
Cache as point of coherence in multiprocessor system

Patent Blumrich, Matthias A.; Ceze, Luis H.; Chen, Dong; ...

In a multiprocessor system, a conflict checking mechanism is implemented in the L2 cache memory. Different versions of speculative writes are maintained in different ways of the cache. A record of speculative writes is maintained in the cache directory. Conflict checking occurs as part of directory lookup. Speculative versions that do not conflict are aggregated into an aggregated version in a different way of the cache. Speculative memory access requests do not go to main memory.
Full Text Available
Programmable partitioning for high-performance coherence domains in a multiprocessor system

Patent Blumrich, Matthias A [Ridgefield, CT]; Salapura, Valentina [Chappaqua, NY]

A multiprocessor computing system and a method of logically partitioning a multiprocessor computing system are disclosed. The multiprocessor computing system comprises a multitude of processing units, and a multitude of snoop units. Each of the processing units includes a local cache, and the snoop units are provided for supporting cache coherency in the multiprocessor system. Each of the snoop units is connected to a respective one of the processing units and to all of the other snoop units. The multiprocessor computing system further includes a partitioning system for using the snoop units to partition the multitude of processing units intomore » « less
Full Text Available
Multiprocessor computer overset grid method and apparatus

Patent Barnette, Daniel W [Veguita, NM]; Ober, Curtis C [Los Lunas, NM]

A multiprocessor computer overset grid method and apparatus comprises associating points in each overset grid with processors and using mapped interpolation transformations to communicate intermediate values between processors assigned base and target points of the interpolation transformations. The method allows a multiprocessor computer to operate with effective load balance on overset grid applications.
Full Text Available
Hardware/software based indirect time stamping methodology for proactive hardware/software event detection and control

Patent Dombrowa, Marc B.; Hoenicke, Dirk I.; Sahoo, Ramendra K.; ...

An improved method and apparatus for time stamping events occurring on a large scale distributed network uses a local counter associated with each processor of the distributed network. Each counter resets at the same time globally so that all events are recorded with respect to a particular time. The counter is stopped when a critical event is detected. The events are masked or filtered in an online or offline fashion to eliminate non-critical events from triggering a collection by the system monitor or service/host processor. The masking can be done dynamically through the use of an event history logger. Themore » « less
Full Text Available

Similar Records

Title: Method and apparatus for single-stepping coherence events in a multiprocessor system under software control

Abstract

Citation Formats

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures journal, August 2005

Directory-based cache coherence in large-scale multiprocessors journal, June 1990

Performance evaluation of adaptive MPI conference, January 2006

Synchronization, coherence, and event ordering in multiprocessors journal, February 1988

Overview of the Blue Gene/L system architecture journal, March 2005

Optimization of MPI collective communication on BlueGene/L systems conference, January 2005

Intel 870: a building block for cost-effective, scalable servers journal, March 2002

Blue Gene/L advanced diagnostics environment journal, March 2005

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
journal, August 2005

Directory-based cache coherence in large-scale multiprocessors
journal, June 1990

Performance evaluation of adaptive MPI
conference, January 2006

Synchronization, coherence, and event ordering in multiprocessors
journal, February 1988

Overview of the Blue Gene/L system architecture
journal, March 2005

Optimization of MPI collective communication on BlueGene/L systems
conference, January 2005

Intel 870: a building block for cost-effective, scalable servers
journal, March 2002

Blue Gene/L advanced diagnostics environment
journal, March 2005