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Title: System and method for programmable bank selection for banked memory subsystems

Abstract

A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

Inventors:
 [1];  [2];  [3];  [4];  [5];  [6];  [7];  [8]
  1. (Ridgefield, CT)
  2. (Croton on Hudson, NY)
  3. (Mount Kisco, NY)
  4. (Irvington, NY)
  5. (Seebruck-Seeon, DE)
  6. (Yorktown Heights, NY)
  7. (Chappaqua, NY)
  8. (Mahopac, NY)
Issue Date:
Research Org.:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org.:
USDOE
OSTI Identifier:
1017170
Patent Number(s):
7,793,038
Application Number:
11/768,805
Assignee:
International Business Machines Corporation (Armonk, NY) OSTI
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English

Citation Formats

Blumrich, Matthias A., Chen, Dong, Gara, Alan G., Giampapa, Mark E., Hoenicke, Dirk, Ohmacht, Martin, Salapura, Valentina, and Sugavanam, Krishnan. System and method for programmable bank selection for banked memory subsystems. United States: N. p., 2010. Web.
Blumrich, Matthias A., Chen, Dong, Gara, Alan G., Giampapa, Mark E., Hoenicke, Dirk, Ohmacht, Martin, Salapura, Valentina, & Sugavanam, Krishnan. System and method for programmable bank selection for banked memory subsystems. United States.
Blumrich, Matthias A., Chen, Dong, Gara, Alan G., Giampapa, Mark E., Hoenicke, Dirk, Ohmacht, Martin, Salapura, Valentina, and Sugavanam, Krishnan. Tue . "System and method for programmable bank selection for banked memory subsystems". United States. https://www.osti.gov/servlets/purl/1017170.
@article{osti_1017170,
title = {System and method for programmable bank selection for banked memory subsystems},
author = {Blumrich, Matthias A. and Chen, Dong and Gara, Alan G. and Giampapa, Mark E. and Hoenicke, Dirk and Ohmacht, Martin and Salapura, Valentina and Sugavanam, Krishnan},
abstractNote = {A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2010},
month = {9}
}

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