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Title: Row fault detection system

Abstract

An apparatus and program product check for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.

Inventors:
; ; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1015191
Patent Number(s):
7,669,075
Application Number:
12/197,556
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B519700
Resource Type:
Patent
Resource Relation:
Patent File Date: 2008 Aug 25
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Archer, Charles Jens, Pinnow, Kurt Walter, Ratterman, Joseph D., and Smith, Brian Edward. Row fault detection system. United States: N. p., 2010. Web.
Archer, Charles Jens, Pinnow, Kurt Walter, Ratterman, Joseph D., & Smith, Brian Edward. Row fault detection system. United States.
Archer, Charles Jens, Pinnow, Kurt Walter, Ratterman, Joseph D., and Smith, Brian Edward. Tue . "Row fault detection system". United States. https://www.osti.gov/servlets/purl/1015191.
@article{osti_1015191,
title = {Row fault detection system},
author = {Archer, Charles Jens and Pinnow, Kurt Walter and Ratterman, Joseph D. and Smith, Brian Edward},
abstractNote = {An apparatus and program product check for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2010},
month = {2}
}

Patent:

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Works referenced in this record:

Fault-tolerant adaptive routing for two-dimensional meshes
conference, January 1995

  • Cunningham, C. M.; Avresky, D. R.
  • Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture
  • DOI: 10.1109/HPCA.1995.386549