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Title: Method for double-sided processing of thin film transistors

Abstract

This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

Inventors:
 [1];  [1];  [1];  [1];  [1];  [2]
  1. Madison, WI
  2. Middleton, WI
Issue Date:
Research Org.:
Wisconsin Alumi Research Foundation (Madison, WI)
Sponsoring Org.:
USDOE
OSTI Identifier:
1014530
Patent Number(s):
7354809
Application Number:
11/276,065
Assignee:
Wisconsin Alumi Research Foundation (Madison, WI)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
FG02-03ER46028
Resource Type:
Patent
Country of Publication:
United States
Language:
English

Citation Formats

Yuan, Hao-Chih, Wang, Guogong, Eriksson, Mark A, Evans, Paul G, Lagally, Max G, and Ma, Zhenqiang. Method for double-sided processing of thin film transistors. United States: N. p., 2008. Web.
Yuan, Hao-Chih, Wang, Guogong, Eriksson, Mark A, Evans, Paul G, Lagally, Max G, & Ma, Zhenqiang. Method for double-sided processing of thin film transistors. United States.
Yuan, Hao-Chih, Wang, Guogong, Eriksson, Mark A, Evans, Paul G, Lagally, Max G, and Ma, Zhenqiang. Tue . "Method for double-sided processing of thin film transistors". United States. https://www.osti.gov/servlets/purl/1014530.
@article{osti_1014530,
title = {Method for double-sided processing of thin film transistors},
author = {Yuan, Hao-Chih and Wang, Guogong and Eriksson, Mark A and Evans, Paul G and Lagally, Max G and Ma, Zhenqiang},
abstractNote = {This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Apr 08 00:00:00 EDT 2008},
month = {Tue Apr 08 00:00:00 EDT 2008}
}

Works referenced in this record:

Soft, conformable electrical contacts for organic semiconductors: High-resolution plastic circuits by lamination
journal, July 2002


Bendable GaAs metal-semiconductor field-effect transistors formed with printed GaAs wire arrays on plastic substrates
journal, August 2005


Silicon-based nanomembrane materials: the ultimate in strain engineering
conference, January 2006


Spin on dopants for high-performance single-crystal silicon transistors on flexible plastic substrates
journal, March 2005


Three-dimensional integration: technology, use, and issues for mixed-signal applications
journal, March 2003


Three-Dimensional Nanofabrication with Rubber Stamps and Conformable Photomasks
journal, August 2004


Bendable single crystal silicon thin film transistors formed by printing on plastic substrates
journal, February 2005


A printable form of silicon for high performance thin film transistors on plastic substrates
journal, June 2004