TY  - COMP
TI  - Code Generators for Floating-Point Unit Design in Integrated Circuits (OpenFloat) v1.0
AB  - This IP provides a comprehensive set of code generators for various floating-point units (FPUs) essential for integrated circuit design and integration, targeting a broad spectrum of applications, including machine learning and scientific computing. The suite includes FP adders, multipliers, subtractors, dividers, reciprocals, exponentials, square roots, trigonometric functions (sine, cosine, arctangent), and more. It supports customizable hardware design parameters, such as precision (16, 32, 64, and 128 bits) and pipeline depths, offering users enhanced flexibility and productivity. The generated code is in an industry-standard hardware description language, ensuring compatibility with standard design flows, including simulation, verification, synthesis, and implementation on both field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).
AU  - Shalf, John
AU  - Popovici, Doru Adrian Thom
AU  - Vega, Mario
AU  - Yang, Xiaokun
DO  - https://doi.org/10.11578/dc.20251009.3
UR  - https://www.osti.gov/doecode/biblio/166589
CY  - United States
PY  - 2025
DA  - 2025-02-04
LA  - English
C1  - Research Org.: Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States); C1  - Research Org.: University of Houston - Clear Lake
C2  - Sponsor Org.: USDOE
C4  - Contract Number: AC02-05CH11231
ER  -