%0Computer Program
%TCode Generators for Floating-Point Unit Design in Integrated Circuits (OpenFloat) v1.0
%XThis IP provides a comprehensive set of code generators for various floating-point units (FPUs) essential for integrated circuit design and integration, targeting a broad spectrum of applications, including machine learning and scientific computing. The suite includes FP adders, multipliers, subtractors, dividers, reciprocals, exponentials, square roots, trigonometric functions (sine, cosine, arctangent), and more. It supports customizable hardware design parameters, such as precision (16, 32, 64, and 128 bits) and pipeline depths, offering users enhanced flexibility and productivity. The generated code is in an industry-standard hardware description language, ensuring compatibility with standard design flows, including simulation, verification, synthesis, and implementation on both field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).
%AShalf, John
%APopovici, Doru Adrian Thom
%AVega, Mario
%AYang, Xiaokun
%Rhttps://doi.org/10.11578/dc.20251009.3
%Uhttps://www.osti.gov/doecode/biblio/166589
%CUnited States
%D2025
%GEnglish
%2USDOE
%1AC02-05CH11231
2025-02-04