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Title: Space and power efficient hybrid counters array

Abstract

A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.

Inventors:
 [1];  [2]
  1. Mount Kisco, NY
  2. Chappaqua, NY
Publication Date:
Research Org.:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org.:
USDOE
OSTI Identifier:
988389
Patent Number(s):
7,532,700
Application Number:
11/507,310
Assignee:
International Business Machines Corporation (Armonk, NY) OSTI
DOE Contract Number:  
B542702
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
47 OTHER INSTRUMENTATION

Citation Formats

Gara, Alan G, and Salapura, Valentina. Space and power efficient hybrid counters array. United States: N. p., 2009. Web.
Gara, Alan G, & Salapura, Valentina. Space and power efficient hybrid counters array. United States.
Gara, Alan G, and Salapura, Valentina. Tue . "Space and power efficient hybrid counters array". United States. https://www.osti.gov/servlets/purl/988389.
@article{osti_988389,
title = {Space and power efficient hybrid counters array},
author = {Gara, Alan G and Salapura, Valentina},
abstractNote = {A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2009},
month = {5}
}

Patent:

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