Method and system for an on-chip AC self-test controller

Flanagan, John D; Herring, Jay R; Lo, Tin-Chee

Title: Method and system for an on-chip AC self-test controller

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Abstract

A method and system for performing AC self-test on an integrated circuit that includes a system clock for use during normal operation are provided. The method includes applying a long data capture pulse to a first test register in response to the system clock, applying an at speed data launch pulse to the first test register in response to the system clock, inputting the data from the first register to a logic path in response to applying the at speed data launch pulse to the first test register, applying an at speed data capture pulse to a second test register in response to the system clock, inputting the logic path output to the second test register in response to applying the at speed data capture pulse to the second test register, and applying a long data launch pulse to the second test register in response to the system clock.

Inventors:

Flanagan, John D ^[1]; Herring, Jay R ^[2]; Lo, Tin-Chee ^[3]

Rhinebeck, NY
Poughkeepsie, NY
Fishkill, NY

Publication Date:: Tue Sep 30 00:00:00 EDT 2008

Research Org.:: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 984512

Patent Number(s):: 7,430,698

Application Number:: 11/323,449

Assignee:: International Business Machines Corporation (Armonk, NY)

DOE Contract Number:: W-7405-ENG-48

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 42 ENGINEERING

Citation Formats


                    Flanagan, John D, Herring, Jay R, and Lo, Tin-Chee. Method and system for an on-chip AC self-test controller.  United States: N. p., 2008. 
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                    Flanagan, John D, Herring, Jay R, & Lo, Tin-Chee. Method and system for an on-chip AC self-test controller.  United States.

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                    Flanagan, John D, Herring, Jay R, and Lo, Tin-Chee. 2008.  
        "Method and system for an on-chip AC self-test controller".  United States.  https://www.osti.gov/servlets/purl/984512.

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@article{osti_984512,

  title        = {Method and system for an on-chip AC self-test controller},

  author       = {Flanagan, John D and Herring, Jay R and Lo, Tin-Chee},

  abstractNote = {A method and system for performing AC self-test on an integrated circuit that includes a system clock for use during normal operation are provided. The method includes applying a long data capture pulse to a first test register in response to the system clock, applying an at speed data launch pulse to the first test register in response to the system clock, inputting the data from the first register to a logic path in response to applying the at speed data launch pulse to the first test register, applying an at speed data capture pulse to a second test register in response to the system clock, inputting the logic path output to the second test register in response to applying the at speed data capture pulse to the second test register, and applying a long data launch pulse to the second test register in response to the system clock.},

  doi          = {},

  url          = {https://www.osti.gov/biblio/984512},
  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Tue Sep 30 00:00:00 EDT 2008},

  month        = {Tue Sep 30 00:00:00 EDT 2008}

}

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