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Title: High Open-Circuit Voltage in Silicon Heterojunction Solar Cells

Abstract

High open-circuit voltage (V{sub oc}) silicon heterojunction (SHJ) solar cells are fabricated in double-heterojunction a-Si:H/c-Si/a-Si:H structures using low temperature (< 225 C) hydrogenated amorphous silicon (a-Si:H) contacts deposited by hot-wire chemical vapor deposition (HWCVD). On p-type c-Si float-zone wafers, we used an amorphous n/i contact to the top surface and an i/p contact to the back surface to obtain a V{sub oc} of 667 mV in a 1 cm{sup 2} cell with an efficiency of 18.2%. This is the best reported p-type SHJ voltage. In our labs, it improves over the 652 mV cell obtained with a front amorphous n/i heterojunction emitter and a high-temperature alloyed Al back-surface-field contact. On n-type c-Si float-zone wafers, we used an a-Si:H (p/i) front emitter and an a-Si:H (i/n) back contact to achieve a V{sub oc} of 691 mV on 1 cm{sup 2} cell. Though not as high as the 730 mV reported by Sanyo on n-wafers, this is the highest reported V{sub oc} for SHJ c-Si cells processed by the HWCVD technique. We found that effective c-Si surface cleaning and a double-heterojunction are keys to obtaining high Voc. Transmission electron microscopy reveals that high V{sub oc} cells require an abrupt interface from c-Simore » to a-Si:H. If the transition from the base wafer to the a-Si:H incorporates either microcrystalline or epitaxial Si at c-Si interface, a low V{sub oc} will result. Lifetime measurement shows that the back-surface-recombination velocity (BSRV) can be reduced to {approx}15 cm/s through a-Si:H passivation. Amorphous silicon heterojunction layers on crystalline wafers thus combine low-surface recombination velocity with excellent carrier extraction.« less

Authors:
; ; ; ; ; ; ; ; ;
Publication Date:
Research Org.:
National Renewable Energy Lab. (NREL), Golden, CO (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
978496
DOE Contract Number:
AC36-08GO28308
Resource Type:
Conference
Resource Relation:
Conference: Amorphous and Polycrystalline Thin-Film Silicon Science and Technology - 2007: Proceedings of the Materials Research Society Symposium, 9-13 April 2007, San Francisco, California; Materials Research Society Symposium Proceedings, Vol. 989; Related Information: (Paper No. 0989-A03-04)
Country of Publication:
United States
Language:
English
Subject:
14 SOLAR ENERGY; 36 MATERIALS SCIENCE; CHEMICAL VAPOR DEPOSITION; EFFICIENCY; ELECTRIC POTENTIAL; HETEROJUNCTIONS; LIFETIME; ORGANIC COMPOUNDS; PASSIVATION; RECOMBINATION; SILICON; SOLAR CELLS; SURFACE CLEANING; TRANSMISSION ELECTRON MICROSCOPY; VELOCITY; VOLATILE MATTER; Solar Energy - Photovoltaics; Silicon Materials and Devices

Citation Formats

Wang, Q., Page, M. R., Iwaniczko, E., Xu, Y., Roybal, L., Bauer, R., Levi, D., Yan, Y., Wang, T., and Branz, H. M. High Open-Circuit Voltage in Silicon Heterojunction Solar Cells. United States: N. p., 2007. Web.
Wang, Q., Page, M. R., Iwaniczko, E., Xu, Y., Roybal, L., Bauer, R., Levi, D., Yan, Y., Wang, T., & Branz, H. M. High Open-Circuit Voltage in Silicon Heterojunction Solar Cells. United States.
Wang, Q., Page, M. R., Iwaniczko, E., Xu, Y., Roybal, L., Bauer, R., Levi, D., Yan, Y., Wang, T., and Branz, H. M. Mon . "High Open-Circuit Voltage in Silicon Heterojunction Solar Cells". United States. doi:.
@article{osti_978496,
title = {High Open-Circuit Voltage in Silicon Heterojunction Solar Cells},
author = {Wang, Q. and Page, M. R. and Iwaniczko, E. and Xu, Y. and Roybal, L. and Bauer, R. and Levi, D. and Yan, Y. and Wang, T. and Branz, H. M.},
abstractNote = {High open-circuit voltage (V{sub oc}) silicon heterojunction (SHJ) solar cells are fabricated in double-heterojunction a-Si:H/c-Si/a-Si:H structures using low temperature (< 225 C) hydrogenated amorphous silicon (a-Si:H) contacts deposited by hot-wire chemical vapor deposition (HWCVD). On p-type c-Si float-zone wafers, we used an amorphous n/i contact to the top surface and an i/p contact to the back surface to obtain a V{sub oc} of 667 mV in a 1 cm{sup 2} cell with an efficiency of 18.2%. This is the best reported p-type SHJ voltage. In our labs, it improves over the 652 mV cell obtained with a front amorphous n/i heterojunction emitter and a high-temperature alloyed Al back-surface-field contact. On n-type c-Si float-zone wafers, we used an a-Si:H (p/i) front emitter and an a-Si:H (i/n) back contact to achieve a V{sub oc} of 691 mV on 1 cm{sup 2} cell. Though not as high as the 730 mV reported by Sanyo on n-wafers, this is the highest reported V{sub oc} for SHJ c-Si cells processed by the HWCVD technique. We found that effective c-Si surface cleaning and a double-heterojunction are keys to obtaining high Voc. Transmission electron microscopy reveals that high V{sub oc} cells require an abrupt interface from c-Si to a-Si:H. If the transition from the base wafer to the a-Si:H incorporates either microcrystalline or epitaxial Si at c-Si interface, a low V{sub oc} will result. Lifetime measurement shows that the back-surface-recombination velocity (BSRV) can be reduced to {approx}15 cm/s through a-Si:H passivation. Amorphous silicon heterojunction layers on crystalline wafers thus combine low-surface recombination velocity with excellent carrier extraction.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Mon Jan 01 00:00:00 EST 2007},
month = {Mon Jan 01 00:00:00 EST 2007}
}

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