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Title: A compiler-directed cache coherence scheme with improved intertask locality

Conference ·
OSTI ID:87678
 [1];  [2]
  1. Univ. of Illinois, Urbana, IL (United States). Center for Supercomputing R and D
  2. Univ. of Minnesota, Minneapolis, MN (United States). Dept. of Computer Science

In this paper, the authors introduce a compiler-directed coherence scheme which can exploit most of the temporal spatial locality across task boundaries. It requires only an extended tag field per cache word, one modified memory access instruction, and a counter called the epoch counter in each processor. By using the epoch counter as a system-wide version number, the scheme simplifies the cache hardware of previous version control or timestamp-based schemes, but still exploits most of the temporal and spatial locality across task boundaries. The authors present a compiler algorithm to generate the appropriate memory access instructions for the proposed scheme. The algorithm is based on a data flow analysis technique. It identifies potential stale references by examining memory reference patterns in a source program.

OSTI ID:
87678
Report Number(s):
CONF-941118-; ISBN 0-8186-6605-6; TRN: IM9535%%310
Resource Relation:
Conference: Supercomputing `94 meeting, Washington, DC (United States), 14-18 Nov 1994; Other Information: PBD: 1994; Related Information: Is Part Of Supercomputing `94: Proceedings; PB: 849 p.
Country of Publication:
United States
Language:
English