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Method and apparatus for thermal processing of semiconductor substrates

Patent ·
OSTI ID:873317
 [1];  [2];  [3];  [4]
  1. Danville, CA
  2. Cardiss, CA
  3. Los Gatos, CA
  4. Alameda, CA
+ Show Author Affiliations
An improved apparatus and method for thermal processing of semiconductor wafers. The apparatus and method provide the temperature stability and uniformity of a conventional batch furnace as well as the processing speed and reduced time-at-temperature of a lamp-heated rapid thermal processor (RTP). Individual wafers are rapidly inserted into and withdrawn from a furnace cavity held at a nearly constant and isothermal temperature. The speeds of insertion and withdrawal are sufficiently large to limit thermal stresses and thereby reduce or prevent plastic deformation of the wafer as it enters and leaves the furnace. By processing the semiconductor wafer in a substantially isothermal cavity, the wafer temperature and spatial uniformity of the wafer temperature can be ensured by measuring and controlling only temperatures of the cavity walls. Further, peak power requirements are very small compared to lamp-heated RTPs because the cavity temperature is not cycled and the thermal mass of the cavity is relatively large. Increased speeds of insertion and/or removal may also be used with non-isothermal furnaces.
Research Organization:
SANDIA CORP
DOE Contract Number:
AC04-94AL85000;
Assignee:
Sandia Corporation (Livermore, CA); Mattson Technology, Inc. (Fremont, CA)
Patent Number(s):
US 6133550
OSTI ID:
873317
Country of Publication:
United States
Language:
English

References (8)

Dislocation dynamics in the plastic deformation of silicon crystals. II. Theoretical analysis of experimental results journal January 1979
Automatic cassette to cassette radiant impulse processor journal January 1985
A new VLSI compatible rapid thermal processing system journal January 1987
Manufacturing Equipment Issues in Rapid Thermal Processing11Based in part on an invited presentation at the SPIE Workshop on Rapid Thermal and Integrated Processing, San Jose, California, September 9, 1991. book January 1993
Scaling wafer stresses and thermal processes to large wafers journal March 1998
Defects introduced in silicon wafers during rapid isothermal annealing: Thermoelastic and thermoplastic effects journal November 1984
Rapid isothermal annealing of ion implantation damage using a thermal radiation source journal October 1981
Warpage of Silicon Wafers journal April 1980

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