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Title: Apparatus and method for defect testing of integrated circuits

Abstract

An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V.sub.DD, to an IC under test and measures a transient voltage component, V.sub.DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V.sub.DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V.sub.DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.

Inventors:
 [1];  [2]
  1. (Albuquerque, NM)
  2. (Placitas, NM)
Publication Date:
Research Org.:
SANDIA CORP
OSTI Identifier:
872882
Patent Number(s):
US 6031386
Assignee:
Sandia Corporation (Albuquerque, NM) SNL
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
apparatus; method; defect; testing; integrated; circuits; failure-mechanism; ics; disclosed; provides; operating; voltage; dd; measures; transient; component; ddt; signal; produced; response; switching; transients; occur; vectors; provided; inputs; amplitude; time; delay; distinguish; defective; defect-free; measured; digitizer; digital; oscilloscope; tester; input; applications; process; manufacture; qualifying; reliability; operating voltage; apparatus provides; time delay; integrated circuits; integrated circuit; transient digitizer; transient voltage; /324/

Citation Formats

Cole, Jr., Edward I., and Soden, Jerry M. Apparatus and method for defect testing of integrated circuits. United States: N. p., 2000. Web.
Cole, Jr., Edward I., & Soden, Jerry M. Apparatus and method for defect testing of integrated circuits. United States.
Cole, Jr., Edward I., and Soden, Jerry M. Sat . "Apparatus and method for defect testing of integrated circuits". United States. https://www.osti.gov/servlets/purl/872882.
@article{osti_872882,
title = {Apparatus and method for defect testing of integrated circuits},
author = {Cole, Jr., Edward I. and Soden, Jerry M.},
abstractNote = {An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V.sub.DD, to an IC under test and measures a transient voltage component, V.sub.DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V.sub.DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V.sub.DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Sat Jan 01 00:00:00 EST 2000},
month = {Sat Jan 01 00:00:00 EST 2000}
}

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