Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies
Patent
·
OSTI ID:867864
- Albuquerque, NM
A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.
- Research Organization:
- AT & T CORP
- DOE Contract Number:
- AC04-76DP00789;
- Assignee:
- United States of America as represented by United States (Washington, DC)
- Patent Number(s):
- US 5023200
- OSTI ID:
- 867864
- Country of Publication:
- United States
- Language:
- English
Similar Records
Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies
Silicon on insulator with active buried regions
Silicon on insulator with active buried regions
Patent
·
1991
·
OSTI ID:6796655
Silicon on insulator with active buried regions
Patent
·
1996
·
OSTI ID:187078
Silicon on insulator with active buried regions
Patent
·
1998
·
OSTI ID:672617
Related Subjects
/438/
anodization
anodizing
barrier
barrier formed
beneath
buried
circuits
circuits including
conductive
conductive layer
conductor
conductors
crystal
crystal silicon
device
etching
fabricated
form
form multiple
formation
formed
forming
including
insulated
insulating
insulating layer
insulators
integrated
integrated circuit
integrated circuits
layer
layer silicon
layers
level
levels
metallized
method
multi-layer
multiple
multiple level
multiple levels
non-porous
oxidized
partially
porous
porous silicon
preferably
semiconductor
semiconductor integrated
separated
silicon
silicon device
silicon layer
silicon layers
silicon substrate
single
single crystal
subsequently
substrate
technologies
anodization
anodizing
barrier
barrier formed
beneath
buried
circuits
circuits including
conductive
conductive layer
conductor
conductors
crystal
crystal silicon
device
etching
fabricated
form
form multiple
formation
formed
forming
including
insulated
insulating
insulating layer
insulators
integrated
integrated circuit
integrated circuits
layer
layer silicon
layers
level
levels
metallized
method
multi-layer
multiple
multiple level
multiple levels
non-porous
oxidized
partially
porous
porous silicon
preferably
semiconductor
semiconductor integrated
separated
silicon
silicon device
silicon layer
silicon layers
silicon substrate
single
single crystal
subsequently
substrate
technologies