Reprogrammable read only variable threshold transistor memory with isolated addressing buffer

Patent · 01 January 1976

OSTI ID:862604

Lodi, Robert J ^[1]

---

1. Tewksbury, MA

A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.

• Research Organization: Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA
• DOE Contract Number: AT(29-1)-789
• Assignee: Sperry Rand Corporation (New York, NY)
• Patent Number(s): US 3971001
• OSTI ID: 862604
• Country of Publication: United States
• Language: English

Related Subjects

/365/257/326/327/
accordance
activated
activates
additionally
address
addressing
application
array
binary
buffer
bulk
circuit
circuits
clearing
common
common substrate
common terminal
comprises
comprising
connected
control
decoded
decoder
directs
drives
effect
effect transistor
effect transistors
fabricated
field
field effect
function
input
inputs
integrated
integrated circuit
isolate
isolated
line
lines
magnitude
means
means provided
memory
memory array
memory comprises
memory transistor
monolithic
monolithic integrated
multi-bit
organized
output
performed
placing
plurality
polarity
predetermined
provided
reading
rectangular
rectangular array
remainder
reprogrammable
selected
selection
simultaneously
substrate
terminal
threshold
transistor
transistors
variable
variable threshold
voltage
voltages
word
words
writing