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Title: The CDF silicon vertex trigger

Abstract

The CDF experiment's Silicon Vertex Trigger is a system of 150 custom 9U VME boards that reconstructs axial tracks in the CDF silicon strip detector in a 15 {mu}sec pipeline. SVT's 35 {mu}m impact parameter resolution enables CDF's Level 2 trigger to distinguish primary and secondary particles, and hence to collect large samples of hadronic bottom and charm decays. We review some of SVT's key design features. Speed is achieved with custom VLSI pattern recognition, linearized track fitting, pipelining, and parallel processing. Testing and reliability are aided by built-in logic state analysis and test-data sourcing at each board's input and output, a common inter-board data link, and a universal ''Merger'' board for data fan-in/fan-out. Speed and adaptability are enhanced by use of modern FPGAs.

Authors:
; ;
Publication Date:
Research Org.:
Fermi National Accelerator Lab., Batavia, IL (US)
Sponsoring Org.:
USDOE; USDOE Office of Energy Research (ER) (US)
OSTI Identifier:
811924
Report Number(s):
FERMILAB-Conf-03/168-E
TRN: US0303229
DOE Contract Number:  
AC02-76CH03000
Resource Type:
Conference
Resource Relation:
Conference: 9th Pisa Meeting on Advanced Detectors: Frontier Detectors for Frontier Physics, La Biodola, Isola d'Elba (IT), 05/25/2003--05/31/2003; Other Information: PBD: 23 Jun 2003
Country of Publication:
United States
Language:
English
Subject:
43 PARTICLE ACCELERATORS; DESIGN; FERMILAB COLLIDER DETECTOR; IMPACT PARAMETER; PARALLEL PROCESSING; PATTERN RECOGNITION; PHYSICS; RELIABILITY; RESOLUTION; SILICON; TESTING; VELOCITY

Citation Formats

Ashmanskas, B, Barchiesi, A, and Bardi, A. The CDF silicon vertex trigger. United States: N. p., 2003. Web.
Ashmanskas, B, Barchiesi, A, & Bardi, A. The CDF silicon vertex trigger. United States.
Ashmanskas, B, Barchiesi, A, and Bardi, A. Mon . "The CDF silicon vertex trigger". United States. https://www.osti.gov/servlets/purl/811924.
@article{osti_811924,
title = {The CDF silicon vertex trigger},
author = {Ashmanskas, B and Barchiesi, A and Bardi, A},
abstractNote = {The CDF experiment's Silicon Vertex Trigger is a system of 150 custom 9U VME boards that reconstructs axial tracks in the CDF silicon strip detector in a 15 {mu}sec pipeline. SVT's 35 {mu}m impact parameter resolution enables CDF's Level 2 trigger to distinguish primary and secondary particles, and hence to collect large samples of hadronic bottom and charm decays. We review some of SVT's key design features. Speed is achieved with custom VLSI pattern recognition, linearized track fitting, pipelining, and parallel processing. Testing and reliability are aided by built-in logic state analysis and test-data sourcing at each board's input and output, a common inter-board data link, and a universal ''Merger'' board for data fan-in/fan-out. Speed and adaptability are enhanced by use of modern FPGAs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2003},
month = {6}
}

Conference:
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