LHCb Base-line Level-O Trigger 3D-Flow Implementation.
The LHCb (Large Hadron Collider Beauty Experiment at CERN, Geneva, Switzerland) Level-0 trigger implementation with the 3D-Flow system is described in detail using components and technology available today. It offers full programmability, allowing it to adapt to unexpected operating conditions and enabling new, unforeseen physics. The 3D-Flow Processor system is a new, technology-independent concept in very fast, real-time system architectures. Based on the replication of a single type of circuit of approximately 100K gates, which communicates in six directions: bidirectional with North, East, West, and South neighbors, unidirectional from Top-to-Bottom, the system offers full programmability, modularity, ease of expansion and adaptation to the latest technology. A complete study of its applicability to the LHCb Calorimeter triggers is presented. Full description of the input data handling, either in digital or mixed digital-analog form, of the data processing, and the transmission of results to the global level- 0 trigger decision unit are provided. Any level-0 trigger algorithm (2x2, 3x3, 4x4, etc.) with up to 20 steps, can be implemented with zero dead time, while sustaining input data rate (up to 32-bit per input channel, per bunchcrossing) at 40 MHz. For each step, each 3D-Flow processor can exchange up to 26 operation, inclusive of compare, ranging, finding local maxima, and efficient data exchange with neighboring channels. (One to one correspondence between input channel and trigger tower). It is shown how the whole Level-0 calorimeter trigger can be accommodated into 6 crates (9U), each containing 16 identical boards carrying only two main types of components, front-end FPGAs (Field Programmable Gate Array) and 3D-Flow processors. All 3D-Flow inter-chip Bottom-to-Top port connections are all contained on the board (data are multiplexed 2:1, printed circuit board (PCB) traces are shorter than 6 cm); all 3D-Flow inter-chip North, East, West, and South port connections between boards and crates are multiplexed (8+2):1 and are shorter than 1.5 meters. Full implementation of a 3D-Flow system, for the most complex trigger algorithm, requires 320 cables to North and South crates and 40 cables to East and West crates (cable cost = $2 each). For applications requiring a simpler real-time algorithm (e.g., requiring less then 20 steps, which is equivalent to 10 layers of 3D-Flow processors), the number of connections for the inter-boards (North and South), and inter-crates (East and West) will also be reduced to the number of layers used by the simpler algorithm, thus not requiring all cables to be installed (e.g., applications requiring only 9 layers of 3D-Flow processors will save 32 cables to the North, 32 to the South, 4 to the East, and 4 to the West crates). Details are also given on timing and synchronization issues, ASIC (Application Specific Integrated Circuit) design verification, real time performance monitoring and design (software and hardware) development tools.
- Research Organization:
- 3D-Computing, Inc., DeSoto, TX (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC)
- DOE Contract Number:
- FG03-95ER81905
- OSTI ID:
- 762186
- Report Number(s):
- LHCb-99-004; TRN: US0300253
- Resource Relation:
- Other Information: nuclear intrustements & metal in physics research, volume 436, issue 3, pages 342-385; PBD: 2 Nov 1999
- Country of Publication:
- United States
- Language:
- English
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