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Title: LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation-hardened CMOS devices and circuits - LDRD Project (FY99)

Abstract

This project represented a coordinated LLNL-SNL collaboration to investigate the feasibility of developing radiation-hardened magnetic non-volatile memories using giant magnetoresistance (GMR) materials. The intent of this limited-duration study was to investigate whether giant magnetoresistance (GMR) materials similar to those used for magnetic tunnel junctions (MTJs) were process compatible with functioning CMOS circuits. Sandia's work on this project demonstrated that deposition of GMR materials did not affect the operation nor the radiation hardness of Sandia's rad-hard CMOS technology, nor did the integration of GMR materials and exposure to ionizing radiation affect the magnetic properties of the GMR films. Thus, following deposition of GMR films on rad-hard integrated circuits, both the circuits and the films survived ionizing radiation levels consistent with DOE mission requirements. Furthermore, Sandia developed techniques to pattern deposited GMR films without degrading the completed integrated circuits upon which they were deposited. The present feasibility study demonstrated all the necessary processing elements to allow fabrication of the non-volatile memory elements onto an existing CMOS chip, and even allow the use of embedded (on-chip) non-volatile memories for system-on-a-chip applications, even in demanding radiation environments. However, funding agencies DTRA, AIM, and DARPA did not have any funds available to support the requiredmore » follow-on technology development projects that would have been required to develop functioning prototype circuits, nor were such funds available from LDRD nor from other DOE program funds.« less

Authors:
; ; ;
Publication Date:
Research Org.:
Sandia National Labs., Albuquerque, NM (US); Sandia National Labs., Livermore, CA (US)
Sponsoring Org.:
US Department of Energy (US)
OSTI Identifier:
750886
Report Number(s):
SAND2000-0218
TRN: US0003536
DOE Contract Number:
AC04-94AL85000
Resource Type:
Technical Report
Resource Relation:
Other Information: PBD: 1 Jan 2000
Country of Publication:
United States
Language:
English
Subject:
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; FEASIBILITY STUDIES; MAGNETIC STORAGE DEVICES; MATERIALS; MAGNETORESISTANCE; MAGNETIC PROPERTIES; PHYSICAL RADIATION EFFECTS; INTEGRATED CIRCUITS; IONIZING RADIATIONS

Citation Formats

MYERS,DAVID R., JESSING,JEFFREY R., SPAHN,OLGA B., and SHANEYFELT,MARTY R. LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation-hardened CMOS devices and circuits - LDRD Project (FY99). United States: N. p., 2000. Web. doi:10.2172/750886.
MYERS,DAVID R., JESSING,JEFFREY R., SPAHN,OLGA B., & SHANEYFELT,MARTY R. LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation-hardened CMOS devices and circuits - LDRD Project (FY99). United States. doi:10.2172/750886.
MYERS,DAVID R., JESSING,JEFFREY R., SPAHN,OLGA B., and SHANEYFELT,MARTY R. Sat . "LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation-hardened CMOS devices and circuits - LDRD Project (FY99)". United States. doi:10.2172/750886. https://www.osti.gov/servlets/purl/750886.
@article{osti_750886,
title = {LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation-hardened CMOS devices and circuits - LDRD Project (FY99)},
author = {MYERS,DAVID R. and JESSING,JEFFREY R. and SPAHN,OLGA B. and SHANEYFELT,MARTY R.},
abstractNote = {This project represented a coordinated LLNL-SNL collaboration to investigate the feasibility of developing radiation-hardened magnetic non-volatile memories using giant magnetoresistance (GMR) materials. The intent of this limited-duration study was to investigate whether giant magnetoresistance (GMR) materials similar to those used for magnetic tunnel junctions (MTJs) were process compatible with functioning CMOS circuits. Sandia's work on this project demonstrated that deposition of GMR materials did not affect the operation nor the radiation hardness of Sandia's rad-hard CMOS technology, nor did the integration of GMR materials and exposure to ionizing radiation affect the magnetic properties of the GMR films. Thus, following deposition of GMR films on rad-hard integrated circuits, both the circuits and the films survived ionizing radiation levels consistent with DOE mission requirements. Furthermore, Sandia developed techniques to pattern deposited GMR films without degrading the completed integrated circuits upon which they were deposited. The present feasibility study demonstrated all the necessary processing elements to allow fabrication of the non-volatile memory elements onto an existing CMOS chip, and even allow the use of embedded (on-chip) non-volatile memories for system-on-a-chip applications, even in demanding radiation environments. However, funding agencies DTRA, AIM, and DARPA did not have any funds available to support the required follow-on technology development projects that would have been required to develop functioning prototype circuits, nor were such funds available from LDRD nor from other DOE program funds.},
doi = {10.2172/750886},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Sat Jan 01 00:00:00 EST 2000},
month = {Sat Jan 01 00:00:00 EST 2000}
}

Technical Report:

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  • The research undertaken in this LDRD-funded project addressed the joint development of magnetic material-based nonvolatile, radiation-hard memory cells with Sandia National Laboratory. Specifically, the goal of this project was to demonstrate the intrinsic radiation-hardness of Giant Magneto-Resistive (GMR) materials by depositing representative alloy combinations upon radiation-hardened silicon-based integrated circuits. All of the stated goals of the project were achieved successfully. The necessary films were successfully deposited upon typical integrated circuits; the materials retained their magnetic field response at the highest radiation doses; and a patterning approach was developed that did not degrade the as-fabricated properties of the underlying circuitry. Thesemore » results establish the feasibility of building radiation-hard magnetic memory cells.« less
  • The program has the objectives of obtaining a better understanding of the radiation-induced n-channel SOS leakage problem and of examining the effects of processing variations on the radiation-induced leakage. Experiments were performed on devices from 6 processing lots--encompassing variations in silicon doping densities and techniques, device design, and device geometry. Experiments on devices having the sapphire thinned to approximately 3 mils and with a gate electrode on the sapphire demonstrated that the radiation-electrode n-channel leakage is due to inversion of the p-type silicon at the sapphire interface by positive charge trapped in the sapphire. This charge was found to saturatemore » at a value of approximately 3 x 10 to the 11th power charges/sq cm, under conditions of +10 V drain bias during irradiation.« less
  • This report describes the research accomplishments achieved under the LDRD Project 'Radiation Hardened Optoelectronic Components for Space-Based Applications.' The aim of this LDRD has been to investigate the radiation hardness of vertical-cavity surface-emitting lasers (VCSELs) and photodiodes by looking at both the effects of total dose and of single-event upsets on the electrical and optical characteristics of VCSELs and photodiodes. These investigations were intended to provide guidance for the eventual integration of radiation hardened VCSELs and photodiodes with rad-hard driver and receiver electronics from an external vendor for space applications. During this one-year project, we have fabricated GaAs-based VCSELs andmore » photodiodes, investigated ionization-induced transient effects due to high-energy protons, and measured the degradation of performance from both high-energy protons and neutrons.« less
  • The design, layout, simulation and characterization of all of the cells in the CMOS/SOS radiation hardened standard cell family were completed, with but one exception. Data sheets were generated providing design information for each of the cells. Among the information included in the data sheets are stage delay and transition times for preradiation and for the worst-case end of total dose 10 to the 6th power rads; input and output capacitances; logic and circuit configurations; truth table; and other design data. Two LSI arrays are being designed to provide experimental evaluation, characterization, and validation of the radiation-hardened CMOS/SOS circuits. Onemore » of these arrays, a test chip with more than 30 tests on it, permits measurements to be taken directly on each of the cells. This provides for determining the effect of total dose and dose rate on the leakage, performance, and reliability of each of the cells. An analysis was completed to determine specifically what changes must be made in the present adder in order to generate the radiation-hardened version. Essentially, this involved the replacement of the radiation-hardened cells for the presently used cells, the elimination of the transmission gate through the arrays, and the elimination of all gates with four or more inputs.« less