Numerical simulation of single event latchup in the temperature range of 77--450 K

Journal Article · Thu Jun 01 00:00:00 EDT 1995 · IEEE Transactions on Nuclear Science

DOI:https://doi.org/10.1109/23.387354· OSTI ID:72646

Iwata, Hideyuki; Ohzone, Takashi ^[1]

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1. Toyama Prefectural Univ. (Japan). Dept. of Electronics and Informatics

In this paper, the temperature dependence of single event latchup in CMOS structures is studied over a temperature range of 77--450 K through two-dimensional device simulation with full-temperature models. Single event latchup immunity first increases as the temperature decreases from 450 K to 120 K, and then decreases rapidly with further decrease in temperature. Therefore, superior latchup immunity can be expected at about 120 K. Furthermore, latchup immunity at 77 K is almost equal or somewhat inferior to that at room temperature. It can be predicted from the results that CMOS devices become extremely susceptible to single event latchup at temperatures below 77 K just as they do at very high temperatures.

• OSTI ID: 72646
• Journal Information: IEEE Transactions on Nuclear Science, Vol. 42, Issue 3; Other Information: PBD: Jun 1995
• Country of Publication: United States
• Language: English

Related Subjects

44 INSTRUMENTATION
INCLUDING NUCLEAR AND PARTICLE DETECTORS
SEMICONDUCTOR DEVICES
PHYSICAL RADIATION EFFECTS
SPACE FLIGHT
COMPUTERIZED SIMULATION
TEMPERATURE RANGE 0065-0273 K
TEMPERATURE RANGE 0273-0400 K
THEORETICAL DATA