Distributed shared memory multiprocessor architecture MEMSY for high performance parallel computations
- Institut fur Mathematische Maschinen und Datenverarbeitung, Universitat Erlangen-Nurnberg, Martensstr. 3, D-8520 Erlangen (DE)
The rapid progress of microprocessors provides economic solutions for small and medium-scale data processing tasks, e.g., workstations. It is a challenging task to combine many powerful microprocessors to a fixed or reconfigurable array which is able to process very large processing tasks with supercomputer performance. Fortunately, many very large applications are regularly structured and can easily be partitioned. One example are physical phenomena which are often described by mathematical models, e.g. by sets of partial differential equations (PDE). In most cases, the mathematical models can only be computed approximately The finer the used model is, the higher is the necessary computational effort. With the appearance of more powerful computers more complicated and more refined models can be calculated. Such user problems are compute- intensive and have strong inherent computational parallelism. Therefore, the needed high performance can be achieved by using many computers working in parallel. In particular, parallel architectures of the MIMD (multiple-instruction multiple-data) type, known as multiprocessors, are well suited because of their higher flexibility with respect to SIMD (single-instruction multiple-data). In this paper, the authors present a distributed shared memory (DSM) architecture that is the basis for the design of a scalable high performance multiprocessor system.
- OSTI ID:
- 7131183
- Journal Information:
- Computer Architecture News; (USA), Vol. 17:6; ISSN 0163-5964
- Country of Publication:
- United States
- Language:
- English
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