Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers

Ngai, C H; Wassel, E R; Watkins, G J

Title: Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers

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Abstract

This patent describes a vector processor. It comprises: a plurality of vector register means, each being divided into a plurality of smaller register means which each have a plurality of outputs; a plurality of element processor means each connected to the plurality of outlets; and instruction processor means.

Inventors:: Ngai, C H; Wassel, E R; Watkins, G J

Publication Date:: Tue Dec 19 00:00:00 EST 1989

OSTI Identifier:: 6937985

Patent Number(s):: US 4888682; A

Application Number:: PPN: US 7-327405A

Assignee:: International Business Machines Corp., Armonk, NY

Resource Type:: Patent

Resource Relation:: Patent File Date: 20 Mar 1989

Country of Publication:: United States

Language:: English

Subject:: 99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; ARRAY PROCESSORS; SUPERCOMPUTERS; PARALLEL PROCESSING; COMPUTER ARCHITECTURE; MEMORY MANAGEMENT; VECTOR PROCESSING; COMPUTERS; DIGITAL COMPUTERS; PROGRAMMING; 990200* - Mathematics & Computers

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                    Ngai, C H, Wassel, E R, and Watkins, G J. Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers.  United States: N. p., 1989. 
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                    Ngai, C H, Wassel, E R, & Watkins, G J. Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers.  United States.

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                    Ngai, C H, Wassel, E R, and Watkins, G J. 1989.  
        "Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers".  United States.

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@article{osti_6937985,

  title        = {Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers},

  author       = {Ngai, C H and Wassel, E R and Watkins, G J},

  abstractNote = {This patent describes a vector processor. It comprises: a plurality of vector register means, each being divided into a plurality of smaller register means which each have a plurality of outputs; a plurality of element processor means each connected to the plurality of outlets; and instruction processor means.},

  doi          = {},

  url          = {https://www.osti.gov/biblio/6937985},
  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Tue Dec 19 00:00:00 EST 1989},

  month        = {Tue Dec 19 00:00:00 EST 1989}

}

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