A random access memory immune to single event upset using a T-Resistor
Patent
·
OSTI ID:6852794
In a random access memory cell, a resistance ''T'' decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell. 4 figs.
- Research Organization:
- Sandia National Labs., Albuquerque, NM (USA)
- DOE Contract Number:
- AC04-76DP00789
- Assignee:
- SNL; EDB-88-182128
- Patent Number(s):
- PATENTS-US-A6113695
- OSTI ID:
- 6852794
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
42 ENGINEERING
420800 -- Engineering-- Electronic Circuits & Devices-- (-1989)
99 GENERAL AND MISCELLANEOUS
990220* -- Computers
Computerized Models
& Computer Programs-- (1987-1989)
DESIGN
FIELD EFFECT TRANSISTORS
INVENTIONS
MATERIALS
MEMORY DEVICES
MOS TRANSISTORS
MOSFET
SEMICONDUCTOR DEVICES
SEMICONDUCTOR MATERIALS
TRANSISTORS
420800 -- Engineering-- Electronic Circuits & Devices-- (-1989)
99 GENERAL AND MISCELLANEOUS
990220* -- Computers
Computerized Models
& Computer Programs-- (1987-1989)
DESIGN
FIELD EFFECT TRANSISTORS
INVENTIONS
MATERIALS
MEMORY DEVICES
MOS TRANSISTORS
MOSFET
SEMICONDUCTOR DEVICES
SEMICONDUCTOR MATERIALS
TRANSISTORS