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Title: AMPLEX-SiCAL; A large dynamic range low-noise CMOS signal processor for silicon calorimeters

Abstract

This paper reports on an analog signal processor using commercial 3 [mu]m CMOS technology which has been designed and produced for the silicon luminosity calorimeter SiCAL of the ALEPH experiment. This processor is a modified version of the AMPLEX integrated circuit designed for the inner silicon detector of the UA-2 experiment. The output voltage swing has been increased to more than 5.5 Volt as required for the large dynamic range of 1000 MIPs or 3.8 pC[sup 2]. A fast analog summation, based on a neural network principle called follower aggregation, computes the average input charges for triggering purposes. The chip contains 16 channels, with a charge amplifier, shaper, track-and-hold stage, multiplexer, fast analog sum and a calibration system. The power consumption of the overall chip is 100 mW. The equivalent noise charge is less than 0.13MIP (0.5 fC rms) for a 50 pF detector capacitance, and the peaking time is about 250ns.

Authors:
; ;  [1]; ; ;  [2];  [3];  [4];  [5]
  1. CEA Saclay (France)
  2. European Organization for Nuclear Research, Geneva (Switzerland)
  3. IMEC, Leuven (Belgium)
  4. INFN, Piza (Italy)
  5. Surrey Univ., Guildford (United Kingdom)
Publication Date:
OSTI Identifier:
6713035
Report Number(s):
CONF-911106-
Journal ID: ISSN 0018-9499; CODEN: IETNAE
Resource Type:
Conference
Journal Name:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
Additional Journal Information:
Journal Volume: 39:4; Conference: 1991 Institute of Electrical and Electronic Engineers (IEEE) nuclear science symposium and medical imaging conference, Santa Fe, NM (United States), 2-9 Nov 1991; Journal ID: ISSN 0018-9499
Country of Publication:
United States
Language:
English
Subject:
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; 99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; CALORIMETERS; INTEGRATED CIRCUITS; HIGH ENERGY PHYSICS; ANALOG SYSTEMS; TEST FACILITIES; MOS TRANSISTORS; DESIGN; NEURAL NETWORKS; PARALLEL PROCESSING; PULSE AMPLIFIERS; AMPLIFIERS; ELECTRONIC CIRCUITS; ELECTRONIC EQUIPMENT; EQUIPMENT; MEASURING INSTRUMENTS; MICROELECTRONIC CIRCUITS; PHYSICS; PROGRAMMING; SEMICONDUCTOR DEVICES; TRANSISTORS; 440104* - Radiation Instrumentation- High Energy Physics Instrumentation; 990200 - Mathematics & Computers

Citation Formats

Beuville, E, Joudon, A, Pascual, J, Grabit, R, Jarron, P, Stefanini, G, Buytaert, S, Cerri, C, and Griffiths, J L. AMPLEX-SiCAL; A large dynamic range low-noise CMOS signal processor for silicon calorimeters. United States: N. p., 1992. Web.
Beuville, E, Joudon, A, Pascual, J, Grabit, R, Jarron, P, Stefanini, G, Buytaert, S, Cerri, C, & Griffiths, J L. AMPLEX-SiCAL; A large dynamic range low-noise CMOS signal processor for silicon calorimeters. United States.
Beuville, E, Joudon, A, Pascual, J, Grabit, R, Jarron, P, Stefanini, G, Buytaert, S, Cerri, C, and Griffiths, J L. 1992. "AMPLEX-SiCAL; A large dynamic range low-noise CMOS signal processor for silicon calorimeters". United States.
@article{osti_6713035,
title = {AMPLEX-SiCAL; A large dynamic range low-noise CMOS signal processor for silicon calorimeters},
author = {Beuville, E and Joudon, A and Pascual, J and Grabit, R and Jarron, P and Stefanini, G and Buytaert, S and Cerri, C and Griffiths, J L},
abstractNote = {This paper reports on an analog signal processor using commercial 3 [mu]m CMOS technology which has been designed and produced for the silicon luminosity calorimeter SiCAL of the ALEPH experiment. This processor is a modified version of the AMPLEX integrated circuit designed for the inner silicon detector of the UA-2 experiment. The output voltage swing has been increased to more than 5.5 Volt as required for the large dynamic range of 1000 MIPs or 3.8 pC[sup 2]. A fast analog summation, based on a neural network principle called follower aggregation, computes the average input charges for triggering purposes. The chip contains 16 channels, with a charge amplifier, shaper, track-and-hold stage, multiplexer, fast analog sum and a calibration system. The power consumption of the overall chip is 100 mW. The equivalent noise charge is less than 0.13MIP (0.5 fC rms) for a 50 pF detector capacitance, and the peaking time is about 250ns.},
doi = {},
url = {https://www.osti.gov/biblio/6713035}, journal = {IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)},
issn = {0018-9499},
number = ,
volume = 39:4,
place = {United States},
year = {1992},
month = {8}
}

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