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Title: Reduction of the effects of the communication delays in scientific algorithms on message passing MIMD architectures

Journal Article · · SIAM J. Sci. Stat. Comput.; (United States)
DOI:https://doi.org/10.1137/0908016· OSTI ID:6566083

The efficient implementation of algorithms on multiprocessor machines requires that the effects of communication delays be minimized. The effects of these delays on the performance of a model problem on a hypercube multiprocessor architecture is investigated, and methods are developed for increasing algorithm efficiency. This paper identifies methods for reducing communication traffic and overhead on a multiprocessor and reports the results of testing these methods on the Intel iPSC Hypercube. The authors examine methods for partitioning a problem's domain across processors, for reducing communication traffic during a global convergence check, for reducing the number of global convergence checks employed during an iteration, and for concurrently iterating on multiple time-steps in a time dependent problem. The empirical results show that use of these methods can markedly reduce a numerical problem's execution time.

Research Organization:
Institute for Computer Applications in Science and Engineering, NASA, Langley Research Center, Hampton, VA 23665
OSTI ID:
6566083
Journal Information:
SIAM J. Sci. Stat. Comput.; (United States), Vol. 8:1
Country of Publication:
United States
Language:
English