VLSI architectures for high speed recognition of context-free languages and finite-state languages
Conference
·
OSTI ID:6483090
Two VLSI architectures for the recognition of context-free languages and finite-state languages are presented. The architecture for context-free languages consists of n(n+1)/2 identical cells and it is capable of recognizing an input string of length n in 2n time units. The architecture for finite-state languages consists of n cells and can recognize a string of length n in constant time. Since both architectures have characteristics such as modular layout, simple control and dataflow pattern, high degree of multiprocessing and/or pipelining, etc., they are very suitable for VLSI implementation. 15 references.
- OSTI ID:
- 6483090
- Resource Relation:
- Conference: Sponsored by IEEE, Austin, TX, USA, 26 Apr 1982
- Country of Publication:
- United States
- Language:
- English
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