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Title: Nonvolatile semiconductor memory having three dimensional charge confinement

Abstract

A nonvolatile semiconductor device has a semiconductor substrate; a storage channel; a first barrier layer between the storage channel and the substrate surface; a second barrier layer covering the opposite surface of the storage channel; and isolation means for controllably permitting charge to flow into or out of the circumference of a storage portion of the storage channel, and for trapping charge in the storage portion. 2 figs.

Inventors:
; ; ; ;
Publication Date:
Research Org.:
Sandia National Labs., Albuquerque, NM (USA)
Sponsoring Org.:
USDOE; USDOE, Washington, DC (USA)
OSTI Identifier:
5860301
Patent Number(s):
PATENTS-US-A7469995
Application Number:
ON: DE91011557; PPN: US 7-469995
Assignee:
Dept. of Energy
DOE Contract Number:  
AC04-76DP00789
Resource Type:
Patent Application
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING; 36 MATERIALS SCIENCE; SEMICONDUCTOR DEVICES; DESIGN; FIELD EFFECT TRANSISTORS; HETEROJUNCTIONS; INVENTIONS; LAYERS; SUBSTRATES; JUNCTIONS; SEMICONDUCTOR JUNCTIONS; TRANSISTORS; 426000* - Engineering- Components, Electron Devices & Circuits- (1990-); 360603 - Materials- Properties

Citation Formats

Dawson, L R, Osbourn, G C, Peercy, P S, Weaver, H T, and Zipperian, T E. Nonvolatile semiconductor memory having three dimensional charge confinement. United States: N. p., 1990. Web.
Dawson, L R, Osbourn, G C, Peercy, P S, Weaver, H T, & Zipperian, T E. Nonvolatile semiconductor memory having three dimensional charge confinement. United States.
Dawson, L R, Osbourn, G C, Peercy, P S, Weaver, H T, and Zipperian, T E. Thu . "Nonvolatile semiconductor memory having three dimensional charge confinement". United States.
@article{osti_5860301,
title = {Nonvolatile semiconductor memory having three dimensional charge confinement},
author = {Dawson, L R and Osbourn, G C and Peercy, P S and Weaver, H T and Zipperian, T E},
abstractNote = {A nonvolatile semiconductor device has a semiconductor substrate; a storage channel; a first barrier layer between the storage channel and the substrate surface; a second barrier layer covering the opposite surface of the storage channel; and isolation means for controllably permitting charge to flow into or out of the circumference of a storage portion of the storage channel, and for trapping charge in the storage portion. 2 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1990},
month = {1}
}