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Title: Super Buffer: a systolic VLSI graphics engine for real-time raster image generation

Abstract

The new Super Buffer family of systems for real time generation of three dimensional, general-purpose, interactive and dynamic raster images is the subject of this thesis. In these systems the conventional 512 x 512 frame buffer is replaced by a 512 x 1 virtual scanline buffer. Image updating, buffering and refreshing are all performed by a single chip Systolic VLSI Raster Graphics Engine. The Engine is composed of an array of identical specialized Pixel Processors which collaborate to break the real time computation barrier by performing several billion Pixel operations per second in order to generate raster images in real time. A basic Super Buffer system has been successfully implemented and tested on a single prototype board connected to an IBM PC-AT. This approach is compared and contrasted to other high performance frame buffer based system architectures. The flexibility and power of the Super Buffer architecture is demonstrated by its ability to execute in real time the computationally intensive hidden surface removal and linear shading algorithms. Furthermore, the basic Super Buffer can be expanded in hardware to handle higher resolution displays and to generate images of high complexity, forming an entire family of systems with the same general architecture.

Authors:
Publication Date:
Research Org.:
Cornell Univ., Ithaca, NY (USA)
OSTI Identifier:
5790960
Resource Type:
Thesis/Dissertation
Resource Relation:
Other Information: Thesis (Ph. D.)
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; ARRAY PROCESSORS; COMPUTER GRAPHICS; IMAGE PROCESSING; ARCHITECTURE; INTEGRATED CIRCUITS; ELECTRONIC CIRCUITS; MICROELECTRONIC CIRCUITS; PROCESSING; 990200* - Mathematics & Computers

Citation Formats

Gharachlorloo, N. Super Buffer: a systolic VLSI graphics engine for real-time raster image generation. United States: N. p., 1985. Web.
Gharachlorloo, N. Super Buffer: a systolic VLSI graphics engine for real-time raster image generation. United States.
Gharachlorloo, N. Tue . "Super Buffer: a systolic VLSI graphics engine for real-time raster image generation". United States.
@article{osti_5790960,
title = {Super Buffer: a systolic VLSI graphics engine for real-time raster image generation},
author = {Gharachlorloo, N},
abstractNote = {The new Super Buffer family of systems for real time generation of three dimensional, general-purpose, interactive and dynamic raster images is the subject of this thesis. In these systems the conventional 512 x 512 frame buffer is replaced by a 512 x 1 virtual scanline buffer. Image updating, buffering and refreshing are all performed by a single chip Systolic VLSI Raster Graphics Engine. The Engine is composed of an array of identical specialized Pixel Processors which collaborate to break the real time computation barrier by performing several billion Pixel operations per second in order to generate raster images in real time. A basic Super Buffer system has been successfully implemented and tested on a single prototype board connected to an IBM PC-AT. This approach is compared and contrasted to other high performance frame buffer based system architectures. The flexibility and power of the Super Buffer architecture is demonstrated by its ability to execute in real time the computationally intensive hidden surface removal and linear shading algorithms. Furthermore, the basic Super Buffer can be expanded in hardware to handle higher resolution displays and to generate images of high complexity, forming an entire family of systems with the same general architecture.},
doi = {},
url = {https://www.osti.gov/biblio/5790960}, journal = {},
number = ,
volume = ,
place = {United States},
year = {1985},
month = {1}
}

Thesis/Dissertation:
Other availability
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