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Title: Performance of the CAMEX64 silicon strip readout chip

Abstract

The CAMEX64 is a 64 channel full custom CMOS chip designed specifically for the readout of silicon strip detectors. CAMEX which stands for CMOS Multichannel Analog MultiplEXer for Silicon Strip Detectors was designed by members of the Franhofer Institute for Microelectronic Circuits and Systems and the Max Planck Institute for Physics and Astrophysics. Each CAMEX channel has a switched capacitor charge sensitive amplifier with 4 sampling capacitors and a multiplexing scheme for reading out each of the channels on an analog bus. The device uses multiple sampling capacitors to filter and reduce input noise. Filtering is controlled through sampling techniques using external clocks. The device operates in a double correlated sampling mode and therefore cannot separate detector leakage current from a charge input. Normal operation of this device is similar to all other silicon readout chips designed and built thus far in that there is a data acquisition cycle during which charge is simultaneously accepted on all channels for a short period of time from a detector array, followed by a readout cycle where that charge or hit information is read out. This device works especially well for colliding beam experiments where the time of charge arrival is accurately known.more » However it can be used in fixed target or asynchronous mode where the time of charge arrival is not well known. In the asynchronous mode it appears that gain is somewhat dependent on the time interval required to decide whether or not to accept charge input information and thus the maximum signal to noise performance found with the synchronous mode may not be achieved in the asynchronous mode. 18 figs., 5 tabs.« less

Authors:
Publication Date:
Research Org.:
Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
OSTI Identifier:
5753408
Report Number(s):
FNAL-TM-1604
ON: DE89014015
DOE Contract Number:  
AC02-76CH03000
Resource Type:
Technical Report
Resource Relation:
Other Information: Paper copy only, copy does not permit microfiche production
Country of Publication:
United States
Language:
English
Subject:
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; 42 ENGINEERING; SI SEMICONDUCTOR DETECTORS; PERFORMANCE TESTING; DATA ACQUISITION SYSTEMS; EXPERIMENTAL DATA; MICROELECTRONIC CIRCUITS; OPERATION; DATA; ELECTRONIC CIRCUITS; INFORMATION; MEASURING INSTRUMENTS; NUMERICAL DATA; RADIATION DETECTORS; SEMICONDUCTOR DETECTORS; TESTING; 440104* - Radiation Instrumentation- High Energy Physics Instrumentation; 420800 - Engineering- Electronic Circuits & Devices- (-1989)

Citation Formats

Yarema, R J. Performance of the CAMEX64 silicon strip readout chip. United States: N. p., 1989. Web. doi:10.2172/5753408.
Yarema, R J. Performance of the CAMEX64 silicon strip readout chip. United States. https://doi.org/10.2172/5753408
Yarema, R J. 1989. "Performance of the CAMEX64 silicon strip readout chip". United States. https://doi.org/10.2172/5753408. https://www.osti.gov/servlets/purl/5753408.
@article{osti_5753408,
title = {Performance of the CAMEX64 silicon strip readout chip},
author = {Yarema, R J},
abstractNote = {The CAMEX64 is a 64 channel full custom CMOS chip designed specifically for the readout of silicon strip detectors. CAMEX which stands for CMOS Multichannel Analog MultiplEXer for Silicon Strip Detectors was designed by members of the Franhofer Institute for Microelectronic Circuits and Systems and the Max Planck Institute for Physics and Astrophysics. Each CAMEX channel has a switched capacitor charge sensitive amplifier with 4 sampling capacitors and a multiplexing scheme for reading out each of the channels on an analog bus. The device uses multiple sampling capacitors to filter and reduce input noise. Filtering is controlled through sampling techniques using external clocks. The device operates in a double correlated sampling mode and therefore cannot separate detector leakage current from a charge input. Normal operation of this device is similar to all other silicon readout chips designed and built thus far in that there is a data acquisition cycle during which charge is simultaneously accepted on all channels for a short period of time from a detector array, followed by a readout cycle where that charge or hit information is read out. This device works especially well for colliding beam experiments where the time of charge arrival is accurately known. However it can be used in fixed target or asynchronous mode where the time of charge arrival is not well known. In the asynchronous mode it appears that gain is somewhat dependent on the time interval required to decide whether or not to accept charge input information and thus the maximum signal to noise performance found with the synchronous mode may not be achieved in the asynchronous mode. 18 figs., 5 tabs.},
doi = {10.2172/5753408},
url = {https://www.osti.gov/biblio/5753408}, journal = {},
number = ,
volume = ,
place = {United States},
year = {Thu Jun 01 00:00:00 EDT 1989},
month = {Thu Jun 01 00:00:00 EDT 1989}
}