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Title: Solder bump height dependence of Josephson chip-to-card interconnection inductance using flip-chip bonding technique

Abstract

Inductance measurements of solder bump flip-chip interconnection for a Josephson chip bonding are carried out by employing direct-coupled two-junction interferometers. For detailed chip bonding design, interconnection inductances are studied experimentally, as functions of solder bump heights, niobium pad shapes with moat structures, and pad positions from the chip ground plane edge. It is found that the ground plane inductance contribution is dominant; the bump height dependence of the interconnection inductance is not a simple linear function, because ground plane image current is modulated by the existence of pads and the moat structure.

Authors:
; ; ; ;
Publication Date:
Research Org.:
Atsugi Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation, Ono, Atsugi-Shi, Kanagawa 243-01, Japan
OSTI Identifier:
5727556
Resource Type:
Journal Article
Journal Name:
J. Appl. Phys.; (United States)
Additional Journal Information:
Journal Volume: 54:9
Country of Publication:
United States
Language:
English
Subject:
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS; INTEGRATED CIRCUITS; BONDING; SOLDERING; JOSEPHSON JUNCTIONS; CONFIGURATION; COUPLING; INTERFEROMETERS; JUNCTIONS; MATHEMATICAL MODELS; NIOBIUM; SOLENOIDS; ELECTRIC COILS; ELECTRICAL EQUIPMENT; ELECTRONIC CIRCUITS; ELEMENTS; EQUIPMENT; FABRICATION; JOINING; MEASURING INSTRUMENTS; METALS; MICROELECTRONIC CIRCUITS; SUPERCONDUCTING JUNCTIONS; TRANSITION ELEMENTS; WELDING; 420201* - Engineering- Cryogenic Equipment & Devices

Citation Formats

Temmyo, J, Aoki, K, Yoshikiyo, H, Tsurumi, S, and Takeuchi, Y. Solder bump height dependence of Josephson chip-to-card interconnection inductance using flip-chip bonding technique. United States: N. p., 1983. Web. doi:10.1063/1.332757.
Temmyo, J, Aoki, K, Yoshikiyo, H, Tsurumi, S, & Takeuchi, Y. Solder bump height dependence of Josephson chip-to-card interconnection inductance using flip-chip bonding technique. United States. doi:10.1063/1.332757.
Temmyo, J, Aoki, K, Yoshikiyo, H, Tsurumi, S, and Takeuchi, Y. Thu . "Solder bump height dependence of Josephson chip-to-card interconnection inductance using flip-chip bonding technique". United States. doi:10.1063/1.332757.
@article{osti_5727556,
title = {Solder bump height dependence of Josephson chip-to-card interconnection inductance using flip-chip bonding technique},
author = {Temmyo, J and Aoki, K and Yoshikiyo, H and Tsurumi, S and Takeuchi, Y},
abstractNote = {Inductance measurements of solder bump flip-chip interconnection for a Josephson chip bonding are carried out by employing direct-coupled two-junction interferometers. For detailed chip bonding design, interconnection inductances are studied experimentally, as functions of solder bump heights, niobium pad shapes with moat structures, and pad positions from the chip ground plane edge. It is found that the ground plane inductance contribution is dominant; the bump height dependence of the interconnection inductance is not a simple linear function, because ground plane image current is modulated by the existence of pads and the moat structure.},
doi = {10.1063/1.332757},
journal = {J. Appl. Phys.; (United States)},
number = ,
volume = 54:9,
place = {United States},
year = {1983},
month = {9}
}