La{sub 0.5}Sr{sub 0.5}CoO{sub 3}/Pb(Nb{sub 0.04}Zr{sub 0.28}Ti{sub 0.68})O{sub 3}/La{sub 0.5}Sr{sub 0.5}CoO{sub 3} thin film heterostructures on Si using TiN/Pt conducting barrier
- Department of Materials and Nuclear Engineering and Center for Superconductivity Research, University of Maryland, College Park, Maryland 20742 (United States)
- LG Electronics Research Center, Seocho-Gu, Seoul 137-140 (Korea)
A high density ferroelectric memory process flow requires the integration of conducting barrier layers to connect the drain of the pass-gate transistor to the bottom electrode of the ferroelectric stack. We are studying the effect of crystallinity of the TiN/Pt barrier layer with Si wafers on the ferroelectric properties of La{sub 0.5}Sr{sub 0.5}CoO{sub 3}/Pb(Nb{sub 0.04}Zr{sub 0.28}Ti{sub 0.68})O{sub 3}/La{sub 0.5}Sr{sub 0.5}CoO{sub 3} (LSCO/PNZT/LSCO) capacitors. Structural studies indicate complete phase purity (i.e., fully perovskite) in both epitaxial and polycrystalline materials. The polycrystalline capacitors show lower remnant polarization and coercive voltages. However, the retention, fatigue, and imprint characteristics are similar, indicating minimal influence of crystalline quality on the ferroelectric properties. {copyright} {ital 1997 American Institute of Physics.}
- OSTI ID:
- 526845
- Journal Information:
- Applied Physics Letters, Vol. 71, Issue 3; Other Information: PBD: Jul 1997
- Country of Publication:
- United States
- Language:
- English
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