skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: ITT 1240 highly reliable distributed control architecture

Abstract

An architectural overview is provided of the fully distributed ITT 1240 system, emphasizing the following points: (1) The software architecture is fundamentally reliable because of the independence of functional modules and the rigor of interface mechanisms. (2) The hardware architecture is fundamentally reliable because the basic failure units are small and use LSI and VLSI components. (3) The architecture is inherently fault tolerant through the decoupling provided by message communication in the systems network. (4) Reliable performance is easily engineered to any level. (5) The field peformance has reached steady state system effectiveness predictions within three months of initial cutovers. 8 references.

Authors:
;
Publication Date:
OSTI Identifier:
5198200
Resource Type:
Conference
Resource Relation:
Conference: Sponsored by IEEE, Port Chester, NY, USA, 31 Oct 1983
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; ARRAY PROCESSORS; ARCHITECTURE; CONTROL; DISTRIBUTED DATA PROCESSING; FAILURES; PERFORMANCE; DATA PROCESSING; PROCESSING; 990200* - Mathematics & Computers

Citation Formats

Conroy, R A, and Malec, H A. ITT 1240 highly reliable distributed control architecture. United States: N. p., 1983. Web.
Conroy, R A, & Malec, H A. ITT 1240 highly reliable distributed control architecture. United States.
Conroy, R A, and Malec, H A. 1983. "ITT 1240 highly reliable distributed control architecture". United States.
@article{osti_5198200,
title = {ITT 1240 highly reliable distributed control architecture},
author = {Conroy, R A and Malec, H A},
abstractNote = {An architectural overview is provided of the fully distributed ITT 1240 system, emphasizing the following points: (1) The software architecture is fundamentally reliable because of the independence of functional modules and the rigor of interface mechanisms. (2) The hardware architecture is fundamentally reliable because the basic failure units are small and use LSI and VLSI components. (3) The architecture is inherently fault tolerant through the decoupling provided by message communication in the systems network. (4) Reliable performance is easily engineered to any level. (5) The field peformance has reached steady state system effectiveness predictions within three months of initial cutovers. 8 references.},
doi = {},
url = {https://www.osti.gov/biblio/5198200}, journal = {},
number = ,
volume = ,
place = {United States},
year = {Sat Jan 01 00:00:00 EST 1983},
month = {Sat Jan 01 00:00:00 EST 1983}
}

Conference:
Other availability
Please see Document Availability for additional information on obtaining the full-text document. Library patrons may search WorldCat to identify libraries that hold this conference proceeding.

Save / Share: